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i965: Allocate temporaries contiguously with other regs in fragment shaders.

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This is required for threads to be spawned with correctly sized GRF
register blocks.
This commit is contained in:
Gary Wong
2008-10-28 15:03:14 -04:00
parent 98fcdf3f49
commit e92a457ac0
2 changed files with 7 additions and 3 deletions
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2
src/mesa/drivers/dri/i965/brw_wm.h
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@@ -246,7 +246,9 @@ struct brw_wm_compile {
struct brw_reg stack;
struct brw_reg emit_mask_reg;
GLuint reg_index;
GLuint tmp_regs[BRW_WM_MAX_GRF];
GLuint tmp_index;
GLuint tmp_max;
};

8
src/mesa/drivers/dri/i965/brw_wm_glsl.c
View File

@@ -47,13 +47,16 @@ static int get_scalar_dst_index(struct prog_instruction *inst)
static struct brw_reg alloc_tmp(struct brw_wm_compile *c)
{
struct brw_reg reg;
reg = brw_vec8_grf(c->tmp_index--, 0);
if(c->tmp_index == c->tmp_max)
c->tmp_regs[ c->tmp_max++ ] = c->reg_index++;
reg = brw_vec8_grf(c->tmp_regs[ c->tmp_index++ ], 0);
return reg;
}
static void release_tmps(struct brw_wm_compile *c)
{
c->tmp_index = 127;
c->tmp_index = 0;
}
static struct brw_reg
@@ -1368,7 +1371,6 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
{
brw_wm_pass_fp(c);
c->tmp_index = 127;
brw_wm_emit_glsl(brw, c);
c->prog_data.total_grf = c->reg_index;
c->prog_data.total_scratch = 0;