intel/compiler: detect if atomic load store operations are used
Patch adds a new arg and modifies existing calls from i965, anv pass NULL but iris stores this information for later use. Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
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@@ -679,6 +679,9 @@ struct brw_stage_prog_data {
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*/
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uint32_t *param;
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uint32_t *pull_param;
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/* Whether shader uses atomic operations. */
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bool uses_atomic_load_store;
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};
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static inline uint32_t *
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@@ -121,7 +121,8 @@ void brw_nir_lower_fs_outputs(nir_shader *nir);
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bool brw_nir_lower_conversions(nir_shader *nir);
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bool brw_nir_lower_image_load_store(nir_shader *nir,
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const struct gen_device_info *devinfo);
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const struct gen_device_info *devinfo,
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bool *uses_atomic_load_store);
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void brw_nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin,
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nir_ssa_def *index);
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void brw_nir_rewrite_bindless_image_intrinsic(nir_intrinsic_instr *intrin,
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@@ -680,7 +680,8 @@ lower_image_size_instr(nir_builder *b,
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bool
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brw_nir_lower_image_load_store(nir_shader *shader,
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const struct gen_device_info *devinfo)
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const struct gen_device_info *devinfo,
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bool *uses_atomic_load_store)
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{
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bool progress = false;
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@@ -718,6 +719,8 @@ brw_nir_lower_image_load_store(nir_shader *shader,
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case nir_intrinsic_image_deref_atomic_xor:
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case nir_intrinsic_image_deref_atomic_exchange:
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case nir_intrinsic_image_deref_atomic_comp_swap:
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if (uses_atomic_load_store)
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*uses_atomic_load_store = true;
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if (lower_image_atomic_instr(&b, devinfo, intrin))
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progress = true;
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break;
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