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blorp,anv,hasvk: Use umod_imm

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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22010>
This commit is contained in:
Alyssa Rosenzweig
2023-03-19 06:38:45 -04:00
committed by Marge Bot
parent 2933af7576
commit e80f209df9
4 changed files with 7 additions and 9 deletions
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2
src/intel/blorp/blorp_blit.c
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@@ -1252,7 +1252,7 @@ brw_blorp_build_nir_shader(struct blorp_context *blorp,
*/ */
assert(dst_pos->num_components == 2); assert(dst_pos->num_components == 2);
nir_ssa_def *dst_x = nir_channel(&b, dst_pos, 0); nir_ssa_def *dst_x = nir_channel(&b, dst_pos, 0);
comp = nir_umod(&b, dst_x, nir_imm_int(&b, 3)); comp = nir_umod_imm(&b, dst_x, 3);
dst_pos = nir_vec2(&b, nir_idiv(&b, dst_x, nir_imm_int(&b, 3)), dst_pos = nir_vec2(&b, nir_idiv(&b, dst_x, nir_imm_int(&b, 3)),
nir_channel(&b, dst_pos, 1)); nir_channel(&b, dst_pos, 1));
} }

6
src/intel/blorp/blorp_clear.c
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@@ -80,8 +80,7 @@ blorp_params_get_clear_kernel_fs(struct blorp_batch *batch,
if (clear_rgb_as_red) { if (clear_rgb_as_red) {
nir_ssa_def *pos = nir_f2i32(&b, nir_load_frag_coord(&b)); nir_ssa_def *pos = nir_f2i32(&b, nir_load_frag_coord(&b));
nir_ssa_def *comp = nir_umod(&b, nir_channel(&b, pos, 0), nir_ssa_def *comp = nir_umod_imm(&b, nir_channel(&b, pos, 0), 3);
nir_imm_int(&b, 3));
color = nir_pad_vec4(&b, nir_vector_extract(&b, color, comp)); color = nir_pad_vec4(&b, nir_vector_extract(&b, color, comp));
} }
@@ -150,8 +149,7 @@ blorp_params_get_clear_kernel_cs(struct blorp_batch *batch,
nir_ssa_def *in_bounds = blorp_check_in_bounds(&b, bounds_rect, dst_pos); nir_ssa_def *in_bounds = blorp_check_in_bounds(&b, bounds_rect, dst_pos);
if (clear_rgb_as_red) { if (clear_rgb_as_red) {
nir_ssa_def *comp = nir_umod(&b, nir_channel(&b, dst_pos, 0), nir_ssa_def *comp = nir_umod_imm(&b, nir_channel(&b, dst_pos, 0), 3);
nir_imm_int(&b, 3));
color = nir_pad_vec4(&b, nir_vector_extract(&b, color, comp)); color = nir_pad_vec4(&b, nir_vector_extract(&b, color, comp));
} }

4
src/intel/vulkan/anv_nir_lower_multiview.c
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@@ -91,8 +91,8 @@ build_view_index(struct lower_multiview_state *state)
* that to an actual view id. * that to an actual view id.
*/ */
nir_ssa_def *compacted = nir_ssa_def *compacted =
nir_umod(b, nir_load_instance_id(b), nir_umod_imm(b, nir_load_instance_id(b),
nir_imm_int(b, util_bitcount(state->view_mask))); util_bitcount(state->view_mask));
if (util_is_power_of_two_or_zero(state->view_mask + 1)) { if (util_is_power_of_two_or_zero(state->view_mask + 1)) {
/* If we have a full view mask, then compacted is what we want */ /* If we have a full view mask, then compacted is what we want */

4
src/intel/vulkan_hasvk/anv_nir_lower_multiview.c
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@@ -91,8 +91,8 @@ build_view_index(struct lower_multiview_state *state)
* that to an actual view id. * that to an actual view id.
*/ */
nir_ssa_def *compacted = nir_ssa_def *compacted =
nir_umod(b, nir_load_instance_id(b), nir_umod_imm(b, nir_load_instance_id(b),
nir_imm_int(b, util_bitcount(state->view_mask))); util_bitcount(state->view_mask));
if (util_is_power_of_two_or_zero(state->view_mask + 1)) { if (util_is_power_of_two_or_zero(state->view_mask + 1)) {
/* If we have a full view mask, then compacted is what we want */ /* If we have a full view mask, then compacted is what we want */