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pvr: Fragment register fb_cdc_zls is feature dependent

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Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23872>
This commit is contained in:
Sarah Walker
2022-08-23 10:50:37 +01:00
committed by Marge Bot
parent 5acbadddb4
commit e714b35301
4 changed files with 18 additions and 4 deletions
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6
src/imagination/common/pvr_device_info.c
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@@ -43,6 +43,7 @@ const struct pvr_device_features pvr_device_features_4_V_2_51 = {
.has_compute_morton_capable = true,
.has_compute_overlap = true,
.has_eight_output_registers = true,
.has_fbcdc_algorithm = true,
.has_gs_rta_support = true,
.has_isp_max_tiles_in_flight = true,
.has_isp_samples_per_pixel = true,
@@ -74,6 +75,7 @@ const struct pvr_device_features pvr_device_features_4_V_2_51 = {
.has_zls_subtile = true,
.common_store_size_in_dwords = 1280U * 4U * 4U,
.fbcdc_algorithm = 2,
.isp_max_tiles_in_flight = 4U,
.isp_samples_per_pixel = 2U,
.max_instances_per_pds_task = 32U,
@@ -92,6 +94,8 @@ const struct pvr_device_features pvr_device_features_4_V_2_51 = {
.uvs_pba_entries = 320U,
.uvs_vtx_entries = 288U,
.vdm_cam_size = 256U,
.has_requires_fb_cdc_zls_setup = true,
};
const struct pvr_device_enhancements pvr_device_enhancements_4_40_2_51 = {
@@ -210,6 +214,7 @@ const struct pvr_device_features pvr_device_features_36_V_104_796 = {
.has_common_store_size_in_dwords = true,
.has_compute = true,
.has_compute_overlap = true,
.has_fbcdc_algorithm = true,
.has_gpu_multicore_support = true,
.has_gs_rta_support = true,
.has_ipf_creq_pf = true,
@@ -251,6 +256,7 @@ const struct pvr_device_features pvr_device_features_36_V_104_796 = {
.has_xpu_max_slaves = true,
.common_store_size_in_dwords = 1344U * 4U * 4U,
.fbcdc_algorithm = 50U,
.isp_max_tiles_in_flight = 6U,
.isp_samples_per_pixel = 4U,
.max_instances_per_pds_task = 32U,

4
src/imagination/common/pvr_device_info.h
View File

@@ -255,6 +255,8 @@ struct pvr_device_features {
bool has_compute_morton_capable : 1;
bool has_compute_overlap : 1;
bool has_eight_output_registers : 1;
bool has_fb_cdc_v4 : 1;
bool has_fbcdc_algorithm;
bool has_gpu_multicore_support : 1;
bool has_gs_rta_support : 1;
bool has_ipf_creq_pf : 1;
@@ -303,6 +305,7 @@ struct pvr_device_features {
bool has_zls_subtile : 1;
uint32_t common_store_size_in_dwords;
uint32_t fbcdc_algorithm;
uint32_t isp_max_tiles_in_flight;
uint32_t isp_samples_per_pixel;
uint32_t max_instances_per_pds_task;
@@ -325,6 +328,7 @@ struct pvr_device_features {
uint32_t xpu_max_slaves;
/* Derived features. */
bool has_requires_fb_cdc_zls_setup : 1;
bool has_s8xe : 1;
};

6
src/imagination/vulkan/pvr_job_render.c
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@@ -1170,8 +1170,10 @@ static void pvr_frag_state_stream_init(struct pvr_render_ctx *ctx,
}
stream_ptr += pvr_cmd_length(CR_ISP_STENCIL_LOAD_BASE);
*(uint64_t *)stream_ptr = 0;
stream_ptr += 2U;
if (PVR_HAS_FEATURE(dev_info, requires_fb_cdc_zls_setup)) {
*(uint64_t *)stream_ptr = 0;
stream_ptr += 2U;
}
STATIC_ASSERT(ARRAY_SIZE(job->pbe_reg_words) == 8U);
STATIC_ASSERT(ARRAY_SIZE(job->pbe_reg_words[0]) == 3U);

6
src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_render.c
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@@ -752,8 +752,10 @@ pvr_srv_fragment_cmd_stream_load(struct rogue_fwif_cmd_3d *const cmd,
regs->isp_stencil_load_store_base = *(const uint64_t *)stream_ptr;
stream_ptr += pvr_cmd_length(CR_ISP_STENCIL_LOAD_BASE);
regs->fb_cdc_zls = *(const uint64_t *)stream_ptr;
stream_ptr += 2U;
if (PVR_HAS_FEATURE(dev_info, requires_fb_cdc_zls_setup)) {
regs->fb_cdc_zls = *(const uint64_t *)stream_ptr;
stream_ptr += 2U;
}
STATIC_ASSERT(ARRAY_SIZE(regs->pbe_word) == 8U);
STATIC_ASSERT(ARRAY_SIZE(regs->pbe_word[0]) == 3U);