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radeonsi/vcn: Only enable filler data for CBR

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Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30221>
This commit is contained in:
David Rosca
2024-07-17 08:53:13 +02:00
committed by Marge Bot
parent b6d8dd6c9f
commit e539f8ef5f
1 changed files with 6 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
src/gallium/drivers/radeonsi/radeon_vcn_enc.c
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@@ -292,7 +292,7 @@ static void radeon_vcn_enc_h264_get_rc_param(struct radeon_encoder *enc,
enc->enc_pic.rc_per_pic.max_qp_i = max_qp; enc->enc_pic.rc_per_pic.max_qp_i = max_qp;
enc->enc_pic.rc_per_pic.max_qp_p = max_qp; enc->enc_pic.rc_per_pic.max_qp_p = max_qp;
enc->enc_pic.rc_per_pic.max_qp_b = max_qp; enc->enc_pic.rc_per_pic.max_qp_b = max_qp;
enc->enc_pic.rc_per_pic.enabled_filler_data = pic->rate_ctrl[0].fill_data_enable; enc->enc_pic.rc_per_pic.enabled_filler_data = 0;
enc->enc_pic.rc_per_pic.skip_frame_enable = pic->rate_ctrl[0].skip_frame_enable; enc->enc_pic.rc_per_pic.skip_frame_enable = pic->rate_ctrl[0].skip_frame_enable;
enc->enc_pic.rc_per_pic.enforce_hrd = pic->rate_ctrl[0].enforce_hrd; enc->enc_pic.rc_per_pic.enforce_hrd = pic->rate_ctrl[0].enforce_hrd;
@@ -303,6 +303,7 @@ static void radeon_vcn_enc_h264_get_rc_param(struct radeon_encoder *enc,
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP:
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT:
enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_CBR; enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_CBR;
enc->enc_pic.rc_per_pic.enabled_filler_data = pic->rate_ctrl[0].fill_data_enable;
break; break;
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP:
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE:
@@ -560,7 +561,7 @@ static void radeon_vcn_enc_hevc_get_rc_param(struct radeon_encoder *enc,
max_qp = pic->rc.max_qp ? pic->rc.max_qp : 51; max_qp = pic->rc.max_qp ? pic->rc.max_qp : 51;
enc->enc_pic.rc_per_pic.max_qp_i = max_qp; enc->enc_pic.rc_per_pic.max_qp_i = max_qp;
enc->enc_pic.rc_per_pic.max_qp_p = max_qp; enc->enc_pic.rc_per_pic.max_qp_p = max_qp;
enc->enc_pic.rc_per_pic.enabled_filler_data = pic->rc.fill_data_enable; enc->enc_pic.rc_per_pic.enabled_filler_data = 0;
enc->enc_pic.rc_per_pic.skip_frame_enable = pic->rc.skip_frame_enable; enc->enc_pic.rc_per_pic.skip_frame_enable = pic->rc.skip_frame_enable;
enc->enc_pic.rc_per_pic.enforce_hrd = pic->rc.enforce_hrd; enc->enc_pic.rc_per_pic.enforce_hrd = pic->rc.enforce_hrd;
switch (pic->rc.rate_ctrl_method) { switch (pic->rc.rate_ctrl_method) {
@@ -570,6 +571,7 @@ static void radeon_vcn_enc_hevc_get_rc_param(struct radeon_encoder *enc,
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP:
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT:
enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_CBR; enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_CBR;
enc->enc_pic.rc_per_pic.enabled_filler_data = pic->rc.fill_data_enable;
break; break;
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP:
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE:
@@ -808,7 +810,7 @@ static void radeon_vcn_enc_av1_get_rc_param(struct radeon_encoder *enc,
max_qp = pic->rc[0].max_qp ? pic->rc[0].max_qp : 255; max_qp = pic->rc[0].max_qp ? pic->rc[0].max_qp : 255;
enc->enc_pic.rc_per_pic.max_qp_i = max_qp; enc->enc_pic.rc_per_pic.max_qp_i = max_qp;
enc->enc_pic.rc_per_pic.max_qp_p = max_qp; enc->enc_pic.rc_per_pic.max_qp_p = max_qp;
enc->enc_pic.rc_per_pic.enabled_filler_data = pic->rc[0].fill_data_enable; enc->enc_pic.rc_per_pic.enabled_filler_data = 0;
enc->enc_pic.rc_per_pic.skip_frame_enable = pic->rc[0].skip_frame_enable; enc->enc_pic.rc_per_pic.skip_frame_enable = pic->rc[0].skip_frame_enable;
enc->enc_pic.rc_per_pic.enforce_hrd = pic->rc[0].enforce_hrd; enc->enc_pic.rc_per_pic.enforce_hrd = pic->rc[0].enforce_hrd;
switch (pic->rc[0].rate_ctrl_method) { switch (pic->rc[0].rate_ctrl_method) {
@@ -818,6 +820,7 @@ static void radeon_vcn_enc_av1_get_rc_param(struct radeon_encoder *enc,
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP:
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT:
enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_CBR; enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_CBR;
enc->enc_pic.rc_per_pic.enabled_filler_data = pic->rc[0].fill_data_enable;
break; break;
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP:
case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE: case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE: