radv: do not link shaders when the next stage is unknown
With GPL, it's possible to build the pre-rasterization stages separately from the fragment stage. Implicit IO (like gl_PrimitiveID) between the last pre-rast stage and the FS will be addressed later. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18516>
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@@ -2437,6 +2437,8 @@ radv_pipeline_link_vs(const struct radv_device *device, struct radv_pipeline_sta
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const struct radv_pipeline_key *pipeline_key)
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{
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assert(vs_stage->nir->info.stage == MESA_SHADER_VERTEX);
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if (next_stage) {
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assert(next_stage->nir->info.stage == MESA_SHADER_TESS_CTRL ||
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next_stage->nir->info.stage == MESA_SHADER_GEOMETRY ||
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next_stage->nir->info.stage == MESA_SHADER_FRAGMENT);
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@@ -2446,18 +2448,19 @@ radv_pipeline_link_vs(const struct radv_device *device, struct radv_pipeline_sta
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}
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radv_pipeline_link_shaders(device, vs_stage->nir, next_stage->nir, pipeline_key);
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}
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nir_foreach_shader_in_variable(var, vs_stage->nir) {
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var->data.driver_location = var->data.location;
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}
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if (next_stage->nir->info.stage == MESA_SHADER_TESS_CTRL) {
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if (next_stage && next_stage->nir->info.stage == MESA_SHADER_TESS_CTRL) {
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nir_linked_io_var_info vs2tcs =
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nir_assign_linked_io_var_locations(vs_stage->nir, next_stage->nir);
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vs_stage->info.vs.num_linked_outputs = vs2tcs.num_linked_io_vars;
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next_stage->info.tcs.num_linked_inputs = vs2tcs.num_linked_io_vars;
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} else if (next_stage->nir->info.stage == MESA_SHADER_GEOMETRY) {
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} else if (next_stage && next_stage->nir->info.stage == MESA_SHADER_GEOMETRY) {
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nir_linked_io_var_info vs2gs =
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nir_assign_linked_io_var_locations(vs_stage->nir, next_stage->nir);
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@@ -2500,6 +2503,8 @@ radv_pipeline_link_tes(const struct radv_device *device, struct radv_pipeline_st
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const struct radv_pipeline_key *pipeline_key)
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{
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assert(tes_stage->nir->info.stage == MESA_SHADER_TESS_EVAL);
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if (next_stage) {
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assert(next_stage->nir->info.stage == MESA_SHADER_GEOMETRY ||
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next_stage->nir->info.stage == MESA_SHADER_FRAGMENT);
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@@ -2508,8 +2513,9 @@ radv_pipeline_link_tes(const struct radv_device *device, struct radv_pipeline_st
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}
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radv_pipeline_link_shaders(device, tes_stage->nir, next_stage->nir, pipeline_key);
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}
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if (next_stage->nir->info.stage == MESA_SHADER_GEOMETRY) {
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if (next_stage && next_stage->nir->info.stage == MESA_SHADER_GEOMETRY) {
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nir_linked_io_var_info tes2gs =
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nir_assign_linked_io_var_locations(tes_stage->nir, next_stage->nir);
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@@ -2528,9 +2534,12 @@ radv_pipeline_link_gs(const struct radv_device *device, struct radv_pipeline_sta
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const struct radv_pipeline_key *pipeline_key)
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{
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assert(gs_stage->nir->info.stage == MESA_SHADER_GEOMETRY);
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if (fs_stage) {
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assert(fs_stage->nir->info.stage == MESA_SHADER_FRAGMENT);
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radv_pipeline_link_shaders(device, gs_stage->nir, fs_stage->nir, pipeline_key);
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}
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nir_foreach_shader_out_variable(var, gs_stage->nir) {
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var->data.driver_location = var->data.location;
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@@ -2555,6 +2564,8 @@ radv_pipeline_link_mesh(const struct radv_device *device, struct radv_pipeline_s
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const struct radv_pipeline_key *pipeline_key)
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{
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assert(mesh_stage->nir->info.stage == MESA_SHADER_MESH);
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if (fs_stage) {
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assert(fs_stage->nir->info.stage == MESA_SHADER_FRAGMENT);
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nir_foreach_shader_in_variable(var, fs_stage->nir) {
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@@ -2567,6 +2578,7 @@ radv_pipeline_link_mesh(const struct radv_device *device, struct radv_pipeline_s
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}
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radv_pipeline_link_shaders(device, mesh_stage->nir, fs_stage->nir, pipeline_key);
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}
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/* ac_nir_lower_ngg ignores driver locations for mesh shaders, but set them to all zero just to
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* be on the safe side.
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@@ -1251,7 +1251,7 @@ radv_link_shaders_info(struct radv_device *device,
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const struct radv_pipeline_key *pipeline_key)
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{
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/* Export primitive ID or clip/cull distances if necessary. */
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if (consumer->stage == MESA_SHADER_FRAGMENT) {
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if (consumer && consumer->stage == MESA_SHADER_FRAGMENT) {
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struct radv_vs_output_info *outinfo = &producer->info.outinfo;
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const bool ps_prim_id_in = consumer->info.ps.prim_id_input;
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const bool ps_clip_dists_in = !!consumer->info.ps.num_input_clips_culls;
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@@ -1276,7 +1276,7 @@ radv_link_shaders_info(struct radv_device *device,
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}
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if (producer->stage == MESA_SHADER_VERTEX || producer->stage == MESA_SHADER_TESS_EVAL) {
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if (consumer->stage == MESA_SHADER_GEOMETRY) {
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if (consumer && consumer->stage == MESA_SHADER_GEOMETRY) {
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uint32_t num_outputs_written;
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if (producer->stage == MESA_SHADER_TESS_EVAL) {
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@@ -1294,20 +1294,21 @@ radv_link_shaders_info(struct radv_device *device,
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/* Compute NGG info (GFX10+) or GS info. */
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if (producer->info.is_ngg) {
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struct radv_pipeline_stage *gs_stage =
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consumer->stage == MESA_SHADER_GEOMETRY ? consumer : NULL;
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consumer && consumer->stage == MESA_SHADER_GEOMETRY ? consumer : NULL;
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gfx10_get_ngg_info(device, producer, gs_stage);
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/* Determine other NGG settings like culling for VS or TES without GS. */
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if (!gs_stage) {
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if (!gs_stage && consumer) {
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radv_determine_ngg_settings(device, producer, consumer, pipeline_key);
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}
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} else if (consumer->stage == MESA_SHADER_GEOMETRY) {
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} else if (consumer && consumer->stage == MESA_SHADER_GEOMETRY) {
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gfx9_get_gs_info(device, producer, consumer);
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}
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}
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if (producer->stage == MESA_SHADER_VERTEX && consumer->stage == MESA_SHADER_TESS_CTRL) {
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if (producer->stage == MESA_SHADER_VERTEX &&
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consumer && consumer->stage == MESA_SHADER_TESS_CTRL) {
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struct radv_pipeline_stage *vs_stage = producer;
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struct radv_pipeline_stage *tcs_stage = consumer;
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@@ -1426,7 +1427,9 @@ radv_nir_shader_info_link(struct radv_device *device, const struct radv_pipeline
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struct radv_pipeline_stage *stages)
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{
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/* Walk backwards to link */
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struct radv_pipeline_stage *next_stage = &stages[MESA_SHADER_FRAGMENT];
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struct radv_pipeline_stage *next_stage =
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stages[MESA_SHADER_FRAGMENT].nir ? &stages[MESA_SHADER_FRAGMENT] : NULL;
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for (int i = ARRAY_SIZE(graphics_shader_order) - 1; i >= 0; i--) {
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gl_shader_stage s = graphics_shader_order[i];
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if (!stages[s].nir)
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