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util: add AMD CPU family enums and enable L3 cache pinning on Zen3

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Based on: https://en.wikichip.org/wiki/amd/cpuid

The only reason it's nominated as a fix is because Zen3 might underperform
because the CPU detection ignored it.

Fixes: 15fa2c5e35 - gallium/u_cpu_detect: get the number of cores per L3 cache for AMD Zen

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8225>
This commit is contained in:
Marek Olšák
2020-12-24 05:43:25 -05:00
committed by Marge Bot
parent 8457be1497
commit e4fa7c440d
2 changed files with 24 additions and 1 deletions
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15
src/util/u_cpu_detect.c
View File

@@ -440,7 +440,8 @@ get_cpu_topology(void)
#if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64) #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
/* AMD Zen */ /* AMD Zen */
if (util_cpu_caps.x86_cpu_type == 0x17) { if (util_cpu_caps.family >= CPU_AMD_ZEN1_ZEN2 &&
util_cpu_caps.family < CPU_AMD_LAST) {
uint32_t regs[4]; uint32_t regs[4];
/* Query the L3 cache count. */ /* Query the L3 cache count. */
@@ -593,6 +594,18 @@ util_cpu_detect_once(void)
if (util_cpu_caps.x86_cpu_type == 0xf) if (util_cpu_caps.x86_cpu_type == 0xf)
util_cpu_caps.x86_cpu_type += ((regs2[0] >> 20) & 0xff); util_cpu_caps.x86_cpu_type += ((regs2[0] >> 20) & 0xff);
switch (util_cpu_caps.x86_cpu_type) {
case 0x17:
util_cpu_caps.family = CPU_AMD_ZEN1_ZEN2;
break;
case 0x18:
util_cpu_caps.family = CPU_AMD_ZEN_HYGON;
break;
case 0x19:
util_cpu_caps.family = CPU_AMD_ZEN3;
break;
}
/* general feature flags */ /* general feature flags */
util_cpu_caps.has_tsc = (regs2[3] >> 4) & 1; /* 0x0000010 */ util_cpu_caps.has_tsc = (regs2[3] >> 4) & 1; /* 0x0000010 */
util_cpu_caps.has_mmx = (regs2[3] >> 23) & 1; /* 0x0800000 */ util_cpu_caps.has_mmx = (regs2[3] >> 23) & 1; /* 0x0800000 */

10
src/util/u_cpu_detect.h
View File

@@ -44,10 +44,20 @@
extern "C" { extern "C" {
#endif #endif
enum cpu_family {
CPU_UNKNOWN,
CPU_AMD_ZEN1_ZEN2,
CPU_AMD_ZEN_HYGON,
CPU_AMD_ZEN3,
CPU_AMD_LAST,
};
typedef uint32_t util_affinity_mask[UTIL_MAX_CPUS / 32]; typedef uint32_t util_affinity_mask[UTIL_MAX_CPUS / 32];
struct util_cpu_caps { struct util_cpu_caps {
int nr_cpus; int nr_cpus;
enum cpu_family family;
/* Feature flags */ /* Feature flags */
int x86_cpu_type; int x86_cpu_type;