OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

radv: Split out cliprect rule generation.

Browse Source 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This commit is contained in:
Bas Nieuwenhuizen
2018-01-15 15:26:41 +01:00
parent acbaef3005
commit e4e060d135
2 changed files with 33 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

57
src/amd/vulkan/radv_pipeline.c
View File

@@ -1163,30 +1163,8 @@ radv_pipeline_init_dynamic_state(struct radv_pipeline *pipeline,
typed_memcpy(dynamic->discard_rectangle.rectangles,
discard_rectangle_info->pDiscardRectangles,
discard_rectangle_info->discardRectangleCount);
unsigned mask = 0;
for (unsigned i = 0; i < (1u << MAX_DISCARD_RECTANGLES); ++i) {
/* Interpret i as a bitmask, and then set the bit in the mask if
* that combination of rectangles in which the pixel is contained
* should pass the cliprect test. */
unsigned relevant_subset = i & ((1u << discard_rectangle_info->discardRectangleCount) - 1);
if (discard_rectangle_info->discardRectangleMode == VK_DISCARD_RECTANGLE_MODE_INCLUSIVE_EXT &&
!relevant_subset)
continue;
if (discard_rectangle_info->discardRectangleMode == VK_DISCARD_RECTANGLE_MODE_EXCLUSIVE_EXT &&
relevant_subset)
continue;
mask |= 1u << i;
}
pipeline->graphics.pa_sc_cliprect_rule = mask;
} else {
/* Allow from all rectangle combinations */
pipeline->graphics.pa_sc_cliprect_rule = 0xffff;
}
pipeline->dynamic_state.mask = states;
}
@@ -2943,6 +2921,37 @@ radv_compute_vgt_shader_stages_en(const struct radv_pipeline *pipeline)
return stages;
}
static uint32_t
radv_compute_cliprect_rule(const VkGraphicsPipelineCreateInfo *pCreateInfo)
{
const VkPipelineDiscardRectangleStateCreateInfoEXT *discard_rectangle_info =
vk_find_struct_const(pCreateInfo->pNext, PIPELINE_DISCARD_RECTANGLE_STATE_CREATE_INFO_EXT);
if (!discard_rectangle_info)
return 0xffff;
unsigned mask = 0;
for (unsigned i = 0; i < (1u << MAX_DISCARD_RECTANGLES); ++i) {
/* Interpret i as a bitmask, and then set the bit in the mask if
* that combination of rectangles in which the pixel is contained
* should pass the cliprect test. */
unsigned relevant_subset = i & ((1u << discard_rectangle_info->discardRectangleCount) - 1);
if (discard_rectangle_info->discardRectangleMode == VK_DISCARD_RECTANGLE_MODE_INCLUSIVE_EXT &&
!relevant_subset)
continue;
if (discard_rectangle_info->discardRectangleMode == VK_DISCARD_RECTANGLE_MODE_EXCLUSIVE_EXT &&
relevant_subset)
continue;
mask |= 1u << i;
}
return mask;
}
static void
radv_pipeline_generate_pm4(struct radv_pipeline *pipeline,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
@@ -2979,7 +2988,7 @@ radv_pipeline_generate_pm4(struct radv_pipeline *pipeline,
}
radeon_set_context_reg(&pipeline->cs, R_028A6C_VGT_GS_OUT_PRIM_TYPE, pipeline->graphics.gs_out);
radeon_set_context_reg(&pipeline->cs, R_02820C_PA_SC_CLIPRECT_RULE, pipeline->graphics.pa_sc_cliprect_rule);
radeon_set_context_reg(&pipeline->cs, R_02820C_PA_SC_CLIPRECT_RULE, radv_compute_cliprect_rule(pCreateInfo));
assert(pipeline->cs.cdw <= pipeline->cs.max_dw);
}