iris: Soft-pin the universe
Breaks everything, woo!
This commit is contained in:
@@ -95,7 +95,7 @@ create_batch_buffer(struct iris_bufmgr *bufmgr,
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struct iris_batch_buffer *buf,
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const char *name, unsigned size)
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{
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buf->bo = iris_bo_alloc(bufmgr, name, size);
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buf->bo = iris_bo_alloc(bufmgr, name, size, IRIS_MEMZONE_OTHER);
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buf->bo->kflags |= EXEC_OBJECT_CAPTURE;
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buf->map = iris_bo_map(NULL, buf->bo, MAP_READ | MAP_WRITE);
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buf->map_next = buf->map;
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@@ -299,7 +299,7 @@ grow_buffer(struct iris_batch *batch,
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const unsigned existing_bytes = buffer_bytes_used(buf);
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struct iris_bo *new_bo =
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iris_bo_alloc(bufmgr, bo->name, new_size);
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iris_bo_alloc(bufmgr, bo->name, new_size, IRIS_MEMZONE_OTHER);
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buf->map = iris_bo_map(NULL, new_bo, MAP_READ | MAP_WRITE);
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buf->map_next = buf->map + existing_bytes;
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@@ -51,6 +51,8 @@
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#include "util/macros.h"
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#include "util/hash_table.h"
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#include "util/list.h"
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#include "util/u_dynarray.h"
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#include "util/vma.h"
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#include "iris_bufmgr.h"
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#include "iris_context.h"
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#include "string.h"
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@@ -93,8 +95,6 @@ drm_ioctl(int fd, unsigned long request, void *arg)
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return ret;
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}
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static inline int
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atomic_add_unless(int *v, int add, int unless)
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{
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@@ -105,9 +105,37 @@ atomic_add_unless(int *v, int add, int unless)
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return c == unless;
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}
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/*
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* Idea:
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*
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* Have a bitmap-allocator for each BO cache bucket size. Because bo_alloc
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* rounds up allocations to the bucket size anyway, we can make 1 bit in the
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* bitmap represent N pages of memory, where N = <bucket size / page size>.
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* Allocations and frees always set/unset a single bit. Because ffsll only
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* works on uint64_t, use a tree(?) of those.
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*
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* Nodes contain a starting address and a uint64_t bitmap. (pair-of-uint64_t)
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* Bitmap uses 1 for a free block, 0 for in-use.
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*
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* Bucket contains...
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*
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* Dynamic array of nodes. (pointer, two ints)
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*/
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struct vma_bucket_node {
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uint64_t start_address;
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uint64_t bitmap;
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};
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struct bo_cache_bucket {
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/** List of cached BOs. */
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struct list_head head;
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/** Size of this bucket, in bytes. */
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uint64_t size;
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/** List of vma_bucket_nodes */
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struct util_dynarray vma_list[IRIS_MEMZONE_COUNT];
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};
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struct iris_bufmgr {
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@@ -123,6 +151,8 @@ struct iris_bufmgr {
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struct hash_table *name_table;
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struct hash_table *handle_table;
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struct util_vma_heap vma_allocator[IRIS_MEMZONE_COUNT];
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bool has_llc:1;
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bool bo_reuse:1;
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};
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@@ -132,6 +162,10 @@ static int bo_set_tiling_internal(struct iris_bo *bo, uint32_t tiling_mode,
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static void bo_free(struct iris_bo *bo);
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static uint64_t vma_alloc(struct iris_bufmgr *bufmgr,
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enum iris_memory_zone memzone,
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uint64_t size, uint64_t alignment);
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static uint32_t
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key_hash_uint(const void *key)
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{
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@@ -191,6 +225,141 @@ bucket_for_size(struct iris_bufmgr *bufmgr, uint64_t size)
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&bufmgr->cache_bucket[index] : NULL;
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}
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static enum iris_memory_zone
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memzone_for_address(uint64_t address)
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{
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const uint64_t _4GB = 1ull << 32;
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if (address >= 3 * _4GB)
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return IRIS_MEMZONE_OTHER;
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if (address >= 2 * _4GB)
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return IRIS_MEMZONE_DYNAMIC;
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if (address >= 1 * _4GB)
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return IRIS_MEMZONE_SURFACE;
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return IRIS_MEMZONE_SHADER;
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}
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static uint64_t
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bucket_vma_alloc(struct iris_bufmgr *bufmgr,
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struct bo_cache_bucket *bucket,
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enum iris_memory_zone memzone)
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{
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struct util_dynarray *vma_list = &bucket->vma_list[memzone];
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struct vma_bucket_node *node;
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if (vma_list->size == 0) {
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/* This bucket allocator is out of space - allocate a new block of
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* memory from a larger allocator (either another bucket or util_vma).
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*
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* Set the first bit used, and return the start address.
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*/
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node = util_dynarray_grow(vma_list, sizeof(struct vma_bucket_node));
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node->start_address =
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vma_alloc(bufmgr, memzone, 64ull * bucket->size, bucket->size);
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node->bitmap = ~1ull;
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return node->start_address;
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}
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/* Pick any bit from any node - they're all the right size and free. */
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node = util_dynarray_top_ptr(vma_list, struct vma_bucket_node);
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int bit = ffsll(node->bitmap) - 1;
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assert(bit != -1);
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/* Reserve the memory by clearing the bit. */
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node->bitmap &= ~(1ull << bit);
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/* If this node is now completely full, remove it from the free list. */
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if (node->bitmap == 0ull) {
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(void) util_dynarray_pop(vma_list, struct vma_bucket_node);
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}
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return node->start_address + bit * bucket->size;
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}
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static void
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bucket_vma_free(struct bo_cache_bucket *bucket,
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uint64_t address,
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uint64_t size)
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{
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enum iris_memory_zone memzone = memzone_for_address(address);
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struct util_dynarray *vma_list = &bucket->vma_list[memzone];
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const uint64_t node_bytes = 64ull * bucket->size;
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struct vma_bucket_node *node = NULL;
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uint64_t start = (address / node_bytes) * node_bytes;
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int bit = (address - start) / bucket->size;
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util_dynarray_foreach(vma_list, struct vma_bucket_node, cur) {
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if (cur->start_address == start) {
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node = cur;
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break;
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}
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}
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if (!node) {
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node = util_dynarray_grow(vma_list, sizeof(struct vma_bucket_node));
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node->start_address = start;
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node->bitmap = 0ull;
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}
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node->bitmap |= 1ull << bit;
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/* The block might be entirely free now, and if so, we could return it
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* to the larger allocator. But we may as well hang on to it, in case
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* we get more allocations at this block size.
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*/
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}
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static struct bo_cache_bucket *
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get_bucket_allocator(struct iris_bufmgr *bufmgr, uint64_t size)
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{
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/* Skip using the bucket allocator for very large sizes, as it allocates
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* 64 of them and this can balloon rather quickly.
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*/
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if (size > 1024 * PAGE_SIZE)
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return NULL;
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struct bo_cache_bucket *bucket = bucket_for_size(bufmgr, size);
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if (bucket && bucket->size == size)
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return bucket;
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return NULL;
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}
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static uint64_t
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vma_alloc(struct iris_bufmgr *bufmgr,
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enum iris_memory_zone memzone,
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uint64_t size,
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uint64_t alignment)
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{
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struct bo_cache_bucket *bucket = get_bucket_allocator(bufmgr, size);
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if (bucket)
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return bucket_vma_alloc(bufmgr, bucket, memzone);
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return util_vma_heap_alloc(&bufmgr->vma_allocator[memzone], size,
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alignment);
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}
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static void
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vma_free(struct iris_bufmgr *bufmgr,
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uint64_t address,
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uint64_t size)
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{
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struct bo_cache_bucket *bucket = get_bucket_allocator(bufmgr, size);
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if (bucket) {
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bucket_vma_free(bucket, address, size);
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} else {
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enum iris_memory_zone memzone = memzone_for_address(address);
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util_vma_heap_free(&bufmgr->vma_allocator[memzone], address, size);
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}
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}
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int
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iris_bo_busy(struct iris_bo *bo)
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{
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@@ -237,6 +406,7 @@ static struct iris_bo *
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bo_alloc_internal(struct iris_bufmgr *bufmgr,
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const char *name,
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uint64_t size,
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enum iris_memory_zone memzone,
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unsigned flags,
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uint32_t tiling_mode,
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uint32_t stride)
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@@ -303,7 +473,15 @@ retry:
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}
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}
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if (!alloc_from_cache) {
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if (alloc_from_cache) {
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/* If the cached BO isn't in the right memory zone, free the old
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* memory and assign it a new address.
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*/
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if (memzone != memzone_for_address(bo->gtt_offset)) {
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vma_free(bufmgr, bo->gtt_offset, size);
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bo->gtt_offset = 0;
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}
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} else {
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bo = calloc(1, sizeof(*bo));
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if (!bo)
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goto err;
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@@ -325,6 +503,7 @@ retry:
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bo->gem_handle = create.handle;
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bo->bufmgr = bufmgr;
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bo->kflags = EXEC_OBJECT_PINNED;
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bo->tiling_mode = I915_TILING_NONE;
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bo->swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
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@@ -347,6 +526,13 @@ retry:
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goto err_free;
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}
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if (bo->gtt_offset == 0ull) {
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bo->gtt_offset = vma_alloc(bufmgr, memzone, bo->size, 1);
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if (bo->gtt_offset == 0ull)
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goto err_free;
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}
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bo->name = name;
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p_atomic_set(&bo->refcount, 1);
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bo->reusable = true;
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@@ -370,17 +556,20 @@ err:
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struct iris_bo *
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iris_bo_alloc(struct iris_bufmgr *bufmgr,
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const char *name,
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uint64_t size)
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uint64_t size,
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enum iris_memory_zone memzone)
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{
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return bo_alloc_internal(bufmgr, name, size, 0, I915_TILING_NONE, 0);
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return bo_alloc_internal(bufmgr, name, size, memzone,
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0, I915_TILING_NONE, 0);
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}
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struct iris_bo *
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iris_bo_alloc_tiled(struct iris_bufmgr *bufmgr, const char *name,
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uint64_t size, uint32_t tiling_mode, uint32_t pitch,
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unsigned flags)
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uint64_t size, enum iris_memory_zone memzone,
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uint32_t tiling_mode, uint32_t pitch, unsigned flags)
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{
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return bo_alloc_internal(bufmgr, name, size, flags, tiling_mode, pitch);
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return bo_alloc_internal(bufmgr, name, size, memzone,
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flags, tiling_mode, pitch);
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}
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/**
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@@ -435,11 +624,13 @@ iris_bo_gem_create_from_name(struct iris_bufmgr *bufmgr,
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bo->size = open_arg.size;
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bo->gtt_offset = 0;
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bo->bufmgr = bufmgr;
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bo->kflags = EXEC_OBJECT_PINNED;
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bo->gem_handle = open_arg.handle;
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bo->name = name;
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bo->global_name = handle;
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bo->reusable = false;
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bo->external = true;
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bo->gtt_offset = vma_alloc(bufmgr, IRIS_MEMZONE_OTHER, bo->size, 1);
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_mesa_hash_table_insert(bufmgr->handle_table, &bo->gem_handle, bo);
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_mesa_hash_table_insert(bufmgr->name_table, &bo->global_name, bo);
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@@ -494,6 +685,8 @@ bo_free(struct iris_bo *bo)
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_mesa_hash_table_remove(bufmgr->handle_table, entry);
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}
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vma_free(bo->bufmgr, bo->gtt_offset, bo->size);
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/* Close this object */
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struct drm_gem_close close = { .handle = bo->gem_handle };
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int ret = drm_ioctl(bufmgr->fd, DRM_IOCTL_GEM_CLOSE, &close);
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@@ -542,9 +735,7 @@ bo_unreference_final(struct iris_bo *bo, time_t time)
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if (bufmgr->bo_reuse && bo->reusable && bucket != NULL &&
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iris_bo_madvise(bo, I915_MADV_DONTNEED)) {
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bo->free_time = time;
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bo->name = NULL;
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bo->kflags = 0;
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list_addtail(&bo->head, &bucket->head);
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} else {
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@@ -960,6 +1151,9 @@ iris_bufmgr_destroy(struct iris_bufmgr *bufmgr)
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bo_free(bo);
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}
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for (int i = 0; i < IRIS_MEMZONE_COUNT; i++)
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util_dynarray_fini(&bucket->vma_list[i]);
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}
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_mesa_hash_table_destroy(bufmgr->name_table, NULL);
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@@ -1052,6 +1246,7 @@ iris_bo_import_dmabuf(struct iris_bufmgr *bufmgr, int prime_fd)
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bo->size = ret;
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bo->bufmgr = bufmgr;
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bo->kflags = EXEC_OBJECT_PINNED;
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bo->gem_handle = handle;
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_mesa_hash_table_insert(bufmgr->handle_table, &bo->gem_handle, bo);
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@@ -1059,6 +1254,7 @@ iris_bo_import_dmabuf(struct iris_bufmgr *bufmgr, int prime_fd)
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bo->name = "prime";
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bo->reusable = false;
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bo->external = true;
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bo->gtt_offset = vma_alloc(bufmgr, IRIS_MEMZONE_OTHER, bo->size, 1);
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struct drm_i915_gem_get_tiling get_tiling = { .handle = bo->gem_handle };
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if (drm_ioctl(bufmgr->fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling))
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@@ -1164,6 +1360,8 @@ add_bucket(struct iris_bufmgr *bufmgr, int size)
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assert(i < ARRAY_SIZE(bufmgr->cache_bucket));
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list_inithead(&bufmgr->cache_bucket[i].head);
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for (int i = 0; i < IRIS_MEMZONE_COUNT; i++)
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util_dynarray_init(&bufmgr->cache_bucket[i].vma_list[i], NULL);
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bufmgr->cache_bucket[i].size = size;
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bufmgr->num_buckets++;
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@@ -1185,12 +1383,12 @@ init_cache_buckets(struct iris_bufmgr *bufmgr)
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* width/height alignment and rounding of sizes to pages will
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* get us useful cache hit rates anyway)
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*/
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add_bucket(bufmgr, 4096);
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add_bucket(bufmgr, 4096 * 2);
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add_bucket(bufmgr, 4096 * 3);
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add_bucket(bufmgr, PAGE_SIZE);
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add_bucket(bufmgr, PAGE_SIZE * 2);
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add_bucket(bufmgr, PAGE_SIZE * 3);
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/* Initialize the linked lists for BO reuse cache. */
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for (size = 4 * 4096; size <= cache_max_size; size *= 2) {
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for (size = 4 * PAGE_SIZE; size <= cache_max_size; size *= 2) {
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add_bucket(bufmgr, size);
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add_bucket(bufmgr, size + size * 1 / 4);
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@@ -1284,6 +1482,17 @@ iris_bufmgr_init(struct gen_device_info *devinfo, int fd)
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bufmgr->has_llc = devinfo->has_llc;
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const uint64_t _4GB = 1ull << 32;
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util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_SHADER],
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PAGE_SIZE, _4GB);
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util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_SURFACE],
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1 * _4GB, _4GB);
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util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_DYNAMIC],
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2 * _4GB, _4GB);
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util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_OTHER],
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3 * _4GB, (1ull << 48) - 3 * _4GB);
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init_cache_buckets(bufmgr);
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bufmgr->name_table =
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|
@@ -35,6 +35,15 @@
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struct gen_device_info;
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struct pipe_debug_callback;
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enum iris_memory_zone {
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IRIS_MEMZONE_DYNAMIC,
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IRIS_MEMZONE_SURFACE,
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IRIS_MEMZONE_SHADER,
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IRIS_MEMZONE_OTHER,
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};
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#define IRIS_MEMZONE_COUNT (IRIS_MEMZONE_OTHER + 1)
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struct iris_bo {
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/**
|
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* Size in bytes of the buffer object.
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@@ -51,31 +60,11 @@ struct iris_bo {
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uint32_t gem_handle;
|
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|
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/**
|
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* Offset of the buffer inside the Graphics Translation Table.
|
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* Virtual address of the buffer inside the PPGTT (Per-Process Graphics
|
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* Translation Table).
|
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*
|
||||
* This is effectively our GPU address for the buffer and we use it
|
||||
* as our base for all state pointers into the buffer. However, since the
|
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* kernel may be forced to move it around during the course of the
|
||||
* buffer's lifetime, we can only know where the buffer was on the last
|
||||
* execbuf. We presume, and are usually right, that the buffer will not
|
||||
* move and so we use that last offset for the next batch and by doing
|
||||
* so we can avoid having the kernel perform a relocation fixup pass as
|
||||
* our pointers inside the batch will be using the correct base offset.
|
||||
*
|
||||
* Since we do use it as a base address for the next batch of pointers,
|
||||
* the kernel treats our offset as a request, and if possible will
|
||||
* arrange the buffer to placed at that address (trying to balance
|
||||
* the cost of buffer migration versus the cost of performing
|
||||
* relocations). Furthermore, we can force the kernel to place the buffer,
|
||||
* or report a failure if we specified a conflicting offset, at our chosen
|
||||
* offset by specifying EXEC_OBJECT_PINNED.
|
||||
*
|
||||
* Note the GTT may be either per context, or shared globally across the
|
||||
* system. On a shared system, our buffers have to contend for address
|
||||
* space with both aperture mappings and framebuffers and so are more
|
||||
* likely to be moved. On a full ppGTT system, each batch exists in its
|
||||
* own GTT, and so each buffer may have their own offset within each
|
||||
* context.
|
||||
* Although each hardware context has its own VMA, we assign BO's to the
|
||||
* same address in all contexts, for simplicity.
|
||||
*/
|
||||
uint64_t gtt_offset;
|
||||
|
||||
@@ -156,7 +145,8 @@ struct iris_bo {
|
||||
*/
|
||||
struct iris_bo *iris_bo_alloc(struct iris_bufmgr *bufmgr,
|
||||
const char *name,
|
||||
uint64_t size);
|
||||
uint64_t size,
|
||||
enum iris_memory_zone memzone);
|
||||
|
||||
/**
|
||||
* Allocate a tiled buffer object.
|
||||
@@ -174,7 +164,8 @@ struct iris_bo *iris_bo_alloc_tiled(struct iris_bufmgr *bufmgr,
|
||||
uint64_t size,
|
||||
uint32_t tiling_mode,
|
||||
uint32_t pitch,
|
||||
unsigned flags);
|
||||
unsigned flags,
|
||||
enum iris_memory_zone memzone);
|
||||
|
||||
/** Takes a reference on a buffer object */
|
||||
static inline void
|
||||
|
@@ -256,19 +256,20 @@ iris_resource_create_with_modifiers(struct pipe_screen *pscreen,
|
||||
.usage = usage,
|
||||
.tiling_flags = 1 << mod_info->tiling);
|
||||
|
||||
res->bo = iris_bo_alloc_tiled(screen->bufmgr, "resource", res->surf.size_B,
|
||||
enum iris_memory_zone memzone = IRIS_MEMZONE_OTHER;
|
||||
const char *name = "resource";
|
||||
if (templ->flags & IRIS_RESOURCE_FLAG_INSTRUCTION_CACHE) {
|
||||
memzone = IRIS_MEMZONE_SHADER;
|
||||
name = "shader kernels";
|
||||
}
|
||||
|
||||
res->bo = iris_bo_alloc_tiled(screen->bufmgr, name, res->surf.size_B,
|
||||
IRIS_MEMZONE_OTHER,
|
||||
isl_tiling_to_i915_tiling(res->surf.tiling),
|
||||
res->surf.row_pitch_B, 0);
|
||||
if (!res->bo)
|
||||
goto fail;
|
||||
|
||||
if (templ->flags & IRIS_RESOURCE_FLAG_INSTRUCTION_CACHE) {
|
||||
res->bo->kflags = EXEC_OBJECT_PINNED;
|
||||
res->bo->name = "instruction cache";
|
||||
// XXX: p_atomic_add is backwards :(
|
||||
res->bo->gtt_offset = __atomic_fetch_add(&screen->next_instruction_address, res->bo->size, __ATOMIC_ACQ_REL);
|
||||
}
|
||||
|
||||
return &res->base;
|
||||
|
||||
fail:
|
||||
|
@@ -526,8 +526,5 @@ iris_screen_create(int fd)
|
||||
pscreen->fence_finish = iris_fence_finish;
|
||||
pscreen->query_memory_info = iris_query_memory_info;
|
||||
|
||||
/* Put them somewhere non-zero */
|
||||
screen->next_instruction_address = 128 * 1024;
|
||||
|
||||
return pscreen;
|
||||
}
|
||||
|
@@ -47,8 +47,6 @@ struct iris_screen {
|
||||
struct isl_device isl_dev;
|
||||
struct iris_bufmgr *bufmgr;
|
||||
struct brw_compiler *compiler;
|
||||
|
||||
uint32_t next_instruction_address;
|
||||
};
|
||||
|
||||
struct pipe_screen *iris_screen_create(int fd);
|
||||
|
Reference in New Issue
Block a user