intel/fs: Get rid of MOV_DISPATCH_TO_FLAGS

We can just emit the MOV in the two places where we use this.

Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Jason Ekstrand
2018-05-23 18:09:48 -07:00
parent 5e3028d826
commit e208bc3bb7
5 changed files with 8 additions and 35 deletions

View File

@@ -509,7 +509,6 @@ enum opcode {
FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN4,
FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7,
FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL,
FS_OPCODE_MOV_DISPATCH_TO_FLAGS,
FS_OPCODE_DISCARD_JUMP,
FS_OPCODE_SET_SAMPLE_ID,
FS_OPCODE_PACK_HALF_2x16_SPLIT,

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@@ -962,7 +962,6 @@ fs_inst::flags_written() const
opcode != BRW_OPCODE_CSEL &&
opcode != BRW_OPCODE_IF &&
opcode != BRW_OPCODE_WHILE)) ||
opcode == FS_OPCODE_MOV_DISPATCH_TO_FLAGS ||
opcode == SHADER_OPCODE_FIND_LIVE_CHANNEL ||
opcode == FS_OPCODE_FB_WRITE) {
return flag_mask(this);
@@ -6752,8 +6751,11 @@ fs_visitor::run_fs(bool allow_spilling, bool do_rep_send)
* Initialize it with the dispatched pixels.
*/
if (wm_prog_data->uses_kill) {
fs_inst *discard_init = bld.emit(FS_OPCODE_MOV_DISPATCH_TO_FLAGS);
discard_init->flag_subreg = 1;
const fs_reg dispatch_mask =
devinfo->gen >= 6 ? brw_vec1_grf(1, 7) : brw_vec1_grf(0, 0);
bld.exec_all().group(1, 0)
.MOV(retype(brw_flag_reg(0, 1), BRW_REGISTER_TYPE_UW),
retype(dispatch_mask, BRW_REGISTER_TYPE_UW));
}
/* Generate FS IR for main(). (the visitor only descends into

View File

@@ -1598,30 +1598,6 @@ fs_generator::generate_varying_pull_constant_load_gen7(fs_inst *inst,
}
}
/**
* Cause the current pixel/sample mask (from R1.7 bits 15:0) to be transferred
* into the flags register (f0.0).
*
* Used only on Gen6 and above.
*/
void
fs_generator::generate_mov_dispatch_to_flags(fs_inst *inst)
{
struct brw_reg flags = brw_flag_subreg(inst->flag_subreg);
struct brw_reg dispatch_mask;
if (devinfo->gen >= 6)
dispatch_mask = retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UW);
else
dispatch_mask = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
brw_push_insn_state(p);
brw_set_default_mask_control(p, BRW_MASK_DISABLE);
brw_set_default_exec_size(p, BRW_EXECUTE_1);
brw_MOV(p, flags, dispatch_mask);
brw_pop_insn_state(p);
}
void
fs_generator::generate_pixel_interpolator_query(fs_inst *inst,
struct brw_reg dst,
@@ -2215,10 +2191,6 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
generate_fb_read(inst, dst, src[0]);
break;
case FS_OPCODE_MOV_DISPATCH_TO_FLAGS:
generate_mov_dispatch_to_flags(inst);
break;
case FS_OPCODE_DISCARD_JUMP:
generate_discard_jump(inst);
break;

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@@ -278,7 +278,9 @@ fs_visitor::emit_interpolation_setup_gen6()
* pixels are lit. Then, for each channel that is unlit,
* replace the centroid data with non-centroid data.
*/
bld.emit(FS_OPCODE_MOV_DISPATCH_TO_FLAGS);
bld.exec_all().group(1, 0)
.MOV(retype(brw_flag_reg(0, 0), BRW_REGISTER_TYPE_UW),
retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UW));
for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) {
if (!(centroid_modes & (1 << i)))

View File

@@ -400,8 +400,6 @@ brw_instruction_name(const struct gen_device_info *devinfo, enum opcode op)
case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL:
return "varying_pull_const_logical";
case FS_OPCODE_MOV_DISPATCH_TO_FLAGS:
return "mov_dispatch_to_flags";
case FS_OPCODE_DISCARD_JUMP:
return "discard_jump";