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freedreno: Clean up tests around ORing in the reloc flags.

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gcc was surprisingly not seeing through this to just do an AND and an OR.
Improves drawoverhead's few uniforms / 1 change throughput 1.64141% +/-
0.188152% (n=60).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4957>
This commit is contained in:
Eric Anholt
2020-05-07 16:34:35 -07:00
parent 6c688ae81f
commit e1c74f3fac
1 changed files with 5 additions and 6 deletions
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11
src/freedreno/drm/msm_ringbuffer_sp.c
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@@ -152,12 +152,11 @@ append_bo(struct msm_submit_sp *submit, struct fd_bo *bo, uint32_t flags)
msm_bo->idx = idx; msm_bo->idx = idx;
} }
if (flags & FD_RELOC_READ) STATIC_ASSERT(FD_RELOC_READ == MSM_SUBMIT_BO_READ);
submit->submit_bos[idx].flags |= MSM_SUBMIT_BO_READ; STATIC_ASSERT(FD_RELOC_WRITE == MSM_SUBMIT_BO_WRITE);
if (flags & FD_RELOC_WRITE) STATIC_ASSERT(FD_RELOC_DUMP == MSM_SUBMIT_BO_DUMP);
submit->submit_bos[idx].flags |= MSM_SUBMIT_BO_WRITE; submit->submit_bos[idx].flags |=
if (flags & FD_RELOC_DUMP) flags & (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE | MSM_SUBMIT_BO_DUMP);
submit->submit_bos[idx].flags |= MSM_SUBMIT_BO_DUMP;
return idx; return idx;
} }