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anv/memcpy: Use addresses instead of bo+offset

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Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
This commit is contained in:
Jason Ekstrand
2018-09-10 16:43:34 -05:00
parent 90b46f6c17
commit e1ab834557
3 changed files with 34 additions and 35 deletions
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6
src/intel/vulkan/anv_genX.h
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@@ -73,13 +73,11 @@ genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
const unsigned entry_size[4]); const unsigned entry_size[4]);
void genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer, void genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
struct anv_bo *dst, uint32_t dst_offset, struct anv_address dst, struct anv_address src,
struct anv_bo *src, uint32_t src_offset,
uint32_t size); uint32_t size);
void genX(cmd_buffer_mi_memcpy)(struct anv_cmd_buffer *cmd_buffer, void genX(cmd_buffer_mi_memcpy)(struct anv_cmd_buffer *cmd_buffer,
struct anv_bo *dst, uint32_t dst_offset, struct anv_address dst, struct anv_address src,
struct anv_bo *src, uint32_t src_offset,
uint32_t size); uint32_t size);
void genX(blorp_exec)(struct blorp_batch *batch, void genX(blorp_exec)(struct blorp_batch *batch,

28
src/intel/vulkan/genX_cmd_buffer.c
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@@ -872,20 +872,21 @@ genX(copy_fast_clear_dwords)(struct anv_cmd_buffer *cmd_buffer,
assert(cmd_buffer && image); assert(cmd_buffer && image);
assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV); assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
struct anv_bo *ss_bo = struct anv_address ss_clear_addr = {
&cmd_buffer->device->surface_state_pool.block_pool.bo; .bo = &cmd_buffer->device->surface_state_pool.block_pool.bo,
uint32_t ss_clear_offset = surface_state.offset + .offset = surface_state.offset +
cmd_buffer->device->isl_dev.ss.clear_value_offset; cmd_buffer->device->isl_dev.ss.clear_value_offset,
};
const struct anv_address entry_addr = const struct anv_address entry_addr =
anv_image_get_clear_color_addr(cmd_buffer->device, image, aspect); anv_image_get_clear_color_addr(cmd_buffer->device, image, aspect);
unsigned copy_size = cmd_buffer->device->isl_dev.ss.clear_value_size; unsigned copy_size = cmd_buffer->device->isl_dev.ss.clear_value_size;
if (copy_from_surface_state) { if (copy_from_surface_state) {
genX(cmd_buffer_mi_memcpy)(cmd_buffer, entry_addr.bo, entry_addr.offset, genX(cmd_buffer_mi_memcpy)(cmd_buffer, entry_addr,
ss_bo, ss_clear_offset, copy_size); ss_clear_addr, copy_size);
} else { } else {
genX(cmd_buffer_mi_memcpy)(cmd_buffer, ss_bo, ss_clear_offset, genX(cmd_buffer_mi_memcpy)(cmd_buffer, ss_clear_addr,
entry_addr.bo, entry_addr.offset, copy_size); entry_addr, copy_size);
/* Updating a surface state object may require that the state cache be /* Updating a surface state object may require that the state cache be
* invalidated. From the SKL PRM, Shared Functions -> State -> State * invalidated. From the SKL PRM, Shared Functions -> State -> State
@@ -1501,8 +1502,15 @@ genX(CmdExecuteCommands)(
struct anv_state dst_state = secondary->state.render_pass_states; struct anv_state dst_state = secondary->state.render_pass_states;
assert(src_state.alloc_size == dst_state.alloc_size); assert(src_state.alloc_size == dst_state.alloc_size);
genX(cmd_buffer_so_memcpy)(primary, ss_bo, dst_state.offset, genX(cmd_buffer_so_memcpy)(primary,
ss_bo, src_state.offset, (struct anv_address) {
.bo = ss_bo,
.offset = dst_state.offset,
},
(struct anv_address) {
.bo = ss_bo,
.offset = src_state.offset,
},
src_state.alloc_size); src_state.alloc_size);
} }

35
src/intel/vulkan/genX_gpu_memcpy.c
View File

@@ -53,14 +53,13 @@ gcd_pow2_u64(uint64_t a, uint64_t b)
void void
genX(cmd_buffer_mi_memcpy)(struct anv_cmd_buffer *cmd_buffer, genX(cmd_buffer_mi_memcpy)(struct anv_cmd_buffer *cmd_buffer,
struct anv_bo *dst, uint32_t dst_offset, struct anv_address dst, struct anv_address src,
struct anv_bo *src, uint32_t src_offset,
uint32_t size) uint32_t size)
{ {
/* This memcpy operates in units of dwords. */ /* This memcpy operates in units of dwords. */
assert(size % 4 == 0); assert(size % 4 == 0);
assert(dst_offset % 4 == 0); assert(dst.offset % 4 == 0);
assert(src_offset % 4 == 0); assert(src.offset % 4 == 0);
#if GEN_GEN == 7 #if GEN_GEN == 7
/* On gen7, the combination of commands used here(MI_LOAD_REGISTER_MEM /* On gen7, the combination of commands used here(MI_LOAD_REGISTER_MEM
@@ -85,14 +84,10 @@ genX(cmd_buffer_mi_memcpy)(struct anv_cmd_buffer *cmd_buffer,
#endif #endif
for (uint32_t i = 0; i < size; i += 4) { for (uint32_t i = 0; i < size; i += 4) {
const struct anv_address src_addr =
(struct anv_address) { src, src_offset + i};
const struct anv_address dst_addr =
(struct anv_address) { dst, dst_offset + i};
#if GEN_GEN >= 8 #if GEN_GEN >= 8
anv_batch_emit(&cmd_buffer->batch, GENX(MI_COPY_MEM_MEM), cp) { anv_batch_emit(&cmd_buffer->batch, GENX(MI_COPY_MEM_MEM), cp) {
cp.DestinationMemoryAddress = dst_addr; cp.DestinationMemoryAddress = anv_address_add(dst, i);
cp.SourceMemoryAddress = src_addr; cp.SourceMemoryAddress = anv_address_add(src, i);
} }
#else #else
/* IVB does not have a general purpose register for command streamer /* IVB does not have a general purpose register for command streamer
@@ -101,11 +96,11 @@ genX(cmd_buffer_mi_memcpy)(struct anv_cmd_buffer *cmd_buffer,
#define TEMP_REG 0x2440 /* GEN7_3DPRIM_BASE_VERTEX */ #define TEMP_REG 0x2440 /* GEN7_3DPRIM_BASE_VERTEX */
anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_MEM), load) { anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_MEM), load) {
load.RegisterAddress = TEMP_REG; load.RegisterAddress = TEMP_REG;
load.MemoryAddress = src_addr; load.MemoryAddress = anv_address_add(src, i);
} }
anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), store) { anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), store) {
store.RegisterAddress = TEMP_REG; store.RegisterAddress = TEMP_REG;
store.MemoryAddress = dst_addr; store.MemoryAddress = anv_address_add(dst, i);
} }
#undef TEMP_REG #undef TEMP_REG
#endif #endif
@@ -115,15 +110,14 @@ genX(cmd_buffer_mi_memcpy)(struct anv_cmd_buffer *cmd_buffer,
void void
genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer, genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
struct anv_bo *dst, uint32_t dst_offset, struct anv_address dst, struct anv_address src,
struct anv_bo *src, uint32_t src_offset,
uint32_t size) uint32_t size)
{ {
if (size == 0) if (size == 0)
return; return;
assert(dst_offset + size <= dst->size); assert(dst.offset + size <= dst.bo->size);
assert(src_offset + size <= src->size); assert(src.offset + size <= src.bo->size);
/* The maximum copy block size is 4 32-bit components at a time. */ /* The maximum copy block size is 4 32-bit components at a time. */
unsigned bs = 16; unsigned bs = 16;
@@ -156,14 +150,14 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
&(struct GENX(VERTEX_BUFFER_STATE)) { &(struct GENX(VERTEX_BUFFER_STATE)) {
.VertexBufferIndex = 32, /* Reserved for this */ .VertexBufferIndex = 32, /* Reserved for this */
.AddressModifyEnable = true, .AddressModifyEnable = true,
.BufferStartingAddress = { src, src_offset }, .BufferStartingAddress = src,
.BufferPitch = bs, .BufferPitch = bs,
#if (GEN_GEN >= 8) #if (GEN_GEN >= 8)
.MemoryObjectControlState = GENX(MOCS), .MemoryObjectControlState = GENX(MOCS),
.BufferSize = size, .BufferSize = size,
#else #else
.VertexBufferMemoryObjectControlState = GENX(MOCS), .VertexBufferMemoryObjectControlState = GENX(MOCS),
.EndAddress = { src, src_offset + size - 1 }, .EndAddress = anv_address_add(src, size - 1),
#endif #endif
}); });
@@ -220,15 +214,14 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_SO_BUFFER), sob) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_SO_BUFFER), sob) {
sob.SOBufferIndex = 0; sob.SOBufferIndex = 0;
sob.SOBufferObjectControlState = GENX(MOCS); sob.SOBufferObjectControlState = GENX(MOCS);
sob.SurfaceBaseAddress = (struct anv_address) { dst, dst_offset }; sob.SurfaceBaseAddress = dst;
#if GEN_GEN >= 8 #if GEN_GEN >= 8
sob.SOBufferEnable = true; sob.SOBufferEnable = true;
sob.SurfaceSize = size / 4 - 1; sob.SurfaceSize = size / 4 - 1;
#else #else
sob.SurfacePitch = bs; sob.SurfacePitch = bs;
sob.SurfaceEndAddress = sob.SurfaceBaseAddress; sob.SurfaceEndAddress = anv_address_add(dst, size);
sob.SurfaceEndAddress.offset += size;
#endif #endif
#if GEN_GEN >= 8 #if GEN_GEN >= 8