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radv,aco: fix enable_mrt_output_nan_fixup for RAGE2 again

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Driver workarounds for game bugs can be easily broken. This one
shouldn't be applied to meta shaders and this restores previous logic.

Fixes: da32cbb5c6 ("aco: fix missing uses of MRT output flags")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20637>
This commit is contained in:
Samuel Pitoiset
2023-01-11 10:28:24 +01:00
committed by Marge Bot
parent 38d6185432
commit e11e68b56b
5 changed files with 7 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/amd/compiler/aco_instruction_selection.cpp
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@@ -11516,7 +11516,7 @@ create_fs_exports(isel_context* ctx)
out.is_int8 = (ctx->options->key.ps.epilog.color_is_int8 >> idx) & 1;
out.is_int10 = (ctx->options->key.ps.epilog.color_is_int10 >> idx) & 1;
out.enable_mrt_output_nan_fixup =
(ctx->options->key.ps.epilog.enable_mrt_output_nan_fixup >> idx) & 1;
(ctx->options->enable_mrt_output_nan_fixup >> idx) & 1;
for (unsigned c = 0; c < 4; ++c) {
if (out.write_mask & (1 << c)) {

1
src/amd/compiler/aco_shader_info.h
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@@ -171,6 +171,7 @@ struct aco_compiler_options {
bool record_ir;
bool record_stats;
bool has_ls_vgpr_init_bug;
uint8_t enable_mrt_output_nan_fixup;
bool wgp_mode;
enum radeon_family family;
enum amd_gfx_level gfx_level;

1
src/amd/vulkan/radv_aco_shader_info.h
View File

@@ -149,6 +149,7 @@ radv_aco_convert_opts(struct aco_compiler_options *aco_info,
ASSIGN_FIELD(record_ir);
ASSIGN_FIELD(record_stats);
ASSIGN_FIELD(has_ls_vgpr_init_bug);
ASSIGN_FIELD(enable_mrt_output_nan_fixup);
ASSIGN_FIELD(wgp_mode);
ASSIGN_FIELD(family);
ASSIGN_FIELD(gfx_level);

3
src/amd/vulkan/radv_nir_to_llvm.c
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@@ -567,8 +567,7 @@ si_llvm_init_export_args(struct radv_shader_context *ctx, LLVMValueRef *values,
(ctx->options->key.ps.epilog.spi_shader_col_format >> (4 * index)) & 0xf;
bool is_int8 = (ctx->options->key.ps.epilog.color_is_int8 >> index) & 1;
bool is_int10 = (ctx->options->key.ps.epilog.color_is_int10 >> index) & 1;
bool enable_mrt_output_nan_fixup =
(ctx->options->key.ps.epilog.enable_mrt_output_nan_fixup >> index) & 1;
bool enable_mrt_output_nan_fixup = (ctx->options->enable_mrt_output_nan_fixup >> index) & 1;
LLVMValueRef (*packf)(struct ac_llvm_context * ctx, LLVMValueRef args[2]) = NULL;
LLVMValueRef (*packi)(struct ac_llvm_context * ctx, LLVMValueRef args[2], unsigned bits,

5
src/amd/vulkan/radv_shader.c
View File

@@ -2375,8 +2375,9 @@ radv_fill_nir_compiler_options(struct radv_nir_compiler_options *options,
options->check_ir = device->instance->debug_flags & RADV_DEBUG_CHECKIR;
options->address32_hi = device->physical_device->rad_info.address32_hi;
options->has_ls_vgpr_init_bug = device->physical_device->rad_info.has_ls_vgpr_init_bug;
options->enable_mrt_output_nan_fixup =
!is_meta_shader && options->key.ps.epilog.enable_mrt_output_nan_fixup;
if (!is_meta_shader)
options->enable_mrt_output_nan_fixup = options->key.ps.epilog.enable_mrt_output_nan_fixup;
}
static struct radv_shader *