radv: don't vectorize shift operations

Currently, these cannot be vectorized as in NIR
shift operands are 32bit while for 16bit-vectorization
they need to be 16bit.

No fossildb changes.

Fixes: fcd2ef23e5 ('radv: vectorize 16bit instructions')

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8612>

src/amd/vulkan/radv_pipeline.c

@@ -3181,10 +3181,10 @@ opt_vectorize_callback(const nir_instr *instr, void *_)
    case nir_op_imax:
    case nir_op_umin:
    case nir_op_umax:
-   case nir_op_ishl:
-   case nir_op_ishr:
-   case nir_op_ushr:
       return true;
+   case nir_op_ishl: /* TODO: in NIR, these have 32bit shift operands */
+   case nir_op_ishr: /* while Radeon needs 16bit operands when vectorized */
+   case nir_op_ushr:
    default:
       return false;
    }