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anv: use companion batch for operations with HIZ/STC_CCS destination

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We're currently crashing a couple of tests :
   dEQP-VK.pipeline.monolithic.depth.xfer_queue_layout.*

   deqp-vk: ../src/intel/blorp/blorp_blit.c:2935:
     blorp_copy: Assertion `blorp_copy_supports_blitter(batch->blorp, src_surf->surf, dst_surf->surf, src_surf->aux_usage, dst_surf->aux_usage)' failed.

Tested on:
  dEQP-VK.api.copy_and_blit.copy_commands2.image_to_image_transfer_queue.all_formats.depth_stencil.*
  dEQP-VK.api.copy_and_blit.multiplanar_xfer.*
  dEQP-VK.pipeline.monolithic.depth.xfer_queue_layout.*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 31eeb72e45 ("blorp: Add support for blorp_copy via XY_BLOCK_COPY_BLT")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34023>
(cherry picked from commit e60416b4e427b120d1b77cbd15f659dc36daf97f)
This commit is contained in:
Lionel Landwerlin
2025-03-12 13:02:34 +02:00
committed by Eric Engestrom
parent 148d66678e
commit dfc807a303
2 changed files with 109 additions and 26 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
.pick_status.json
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@@ -354,7 +354,7 @@
"description": "anv: use companion batch for operations with HIZ/STC_CCS destination",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "31eeb72e45be6ef943df0b60f3cd7a646fa7b349",
"notes": null

133
src/intel/vulkan/anv_blorp.c
View File

@@ -543,42 +543,125 @@ anv_blorp_blitter_execute_on_companion(struct anv_cmd_buffer *cmd_buffer,
return blorp_execute_on_companion;
}
static bool
is_image_multisampled(struct anv_image *image)
{
return image->vk.samples > 1;
}
static bool
is_image_emulated(struct anv_image *image)
{
return image->emu_plane_format != VK_FORMAT_UNDEFINED;
}
static bool
is_image_hiz_compressed(struct anv_image *image)
{
if (!(image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
return false;
const uint32_t plane =
anv_image_aspect_to_plane(image, VK_IMAGE_ASPECT_DEPTH_BIT);
return isl_aux_usage_has_hiz(image->planes[plane].aux_usage);
}
static bool
is_image_hiz_non_wt_ccs_compressed(struct anv_image *image)
{
if (!(image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
return false;
const uint32_t plane =
anv_image_aspect_to_plane(image, VK_IMAGE_ASPECT_DEPTH_BIT);
return isl_aux_usage_has_hiz(image->planes[plane].aux_usage) &&
image->planes[plane].aux_usage != ISL_AUX_USAGE_HIZ_CCS_WT;
}
static bool
is_image_hiz_non_ccs_compressed(struct anv_image *image)
{
if (!(image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
return false;
const uint32_t plane =
anv_image_aspect_to_plane(image, VK_IMAGE_ASPECT_DEPTH_BIT);
return image->planes[plane].aux_usage == ISL_AUX_USAGE_HIZ;
}
static bool
is_image_stc_ccs_compressed(struct anv_image *image)
{
/* STC_CCS is used for the CPS surfaces, hence the COLOR_BIT inclusion */
if (!(image->vk.aspects & (VK_IMAGE_ASPECT_STENCIL_BIT |
VK_IMAGE_ASPECT_COLOR_BIT)))
return false;
const uint32_t plane =
anv_image_aspect_to_plane(image,
image->vk.aspects &
(VK_IMAGE_ASPECT_COLOR_BIT |
VK_IMAGE_ASPECT_STENCIL_BIT));
return image->planes[plane].aux_usage == ISL_AUX_USAGE_STC_CCS;
}
static bool
anv_blorp_execute_on_companion(struct anv_cmd_buffer *cmd_buffer,
struct anv_image *src_image,
struct anv_image *dst_image)
{
const struct intel_device_info *devinfo = cmd_buffer->device->info;
/* RCS can do everything, it's the Über-engine */
if (anv_cmd_buffer_is_render_queue(cmd_buffer))
return false;
/* MSAA images have to be dealt with on the companion RCS command buffer
* for both CCS && BCS engines.
*
* TODO: relax this for Xe3+ on CCS when we have Blorp MSAA copies.
*/
if ((anv_cmd_buffer_is_blitter_queue(cmd_buffer) ||
anv_cmd_buffer_is_compute_queue(cmd_buffer)) &&
dst_image->vk.samples > 1)
if ((src_image && is_image_multisampled(src_image)) ||
(dst_image && is_image_multisampled(dst_image)))
return true;
/* Emulation of formats is done through a compute shader, so we need
* the companion command buffer for the BCS engine.
*/
if (anv_cmd_buffer_is_blitter_queue(cmd_buffer) &&
dst_image->emu_plane_format != VK_FORMAT_UNDEFINED)
return true;
if (anv_cmd_buffer_is_blitter_queue(cmd_buffer)) {
/* Emulation of formats is done through a compute shader, so we need the
* companion command buffer for the blitter engine.
*/
if ((src_image && is_image_emulated(src_image)) ||
(dst_image && is_image_emulated(dst_image)))
return false;
/* HSD 14021541470:
* The compression pairing bit on blitter engine is not programmed correctly
* for stencil resources. Fallback to RCS engine for performing a copy to
* workaround the issue.
*/
if (anv_cmd_buffer_is_blitter_queue(cmd_buffer) &&
(devinfo->verx10 == 125) &&
(dst_image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT)) {
const uint32_t plane =
anv_image_aspect_to_plane(dst_image, VK_IMAGE_ASPECT_STENCIL_BIT);
if (isl_aux_usage_has_compression(dst_image->planes[plane].aux_usage))
/* HSD 14021541470: The compression pairing bit on blitter engine is not
* programmed correctly for depth/stencil resources. Fallback to RCS
* engine for performing a copy to workaround the issue.
*/
if (devinfo->verx10 == 125 &&
((src_image && (is_image_stc_ccs_compressed(src_image) ||
is_image_hiz_compressed(src_image))) ||
(dst_image && (is_image_stc_ccs_compressed(dst_image) ||
is_image_hiz_compressed(dst_image)))))
return true;
}
/* HiZ compression without CCS_WT will not work, it would require us to
* synchronize the HiZ data with CCS on queue transfer.
*/
if (src_image && is_image_hiz_non_wt_ccs_compressed(src_image))
return true;
/* Pre Gfx20 the only engine that can generate STC_CCS data is RCS through
* the stencil output due to the difference in compression pairing bit. On
* Gfx20 there is no difference.
*/
if (devinfo->ver < 20 && dst_image && is_image_stc_ccs_compressed(dst_image))
return true;
/* Blitter & compute engine cannot generate HiZ data */
if (dst_image && is_image_hiz_compressed(dst_image))
return true;
return false;
}
@@ -593,7 +676,7 @@ void anv_CmdCopyImage2(
struct anv_cmd_buffer *main_cmd_buffer = cmd_buffer;
UNUSED struct anv_state rcs_done = ANV_STATE_NULL;
if (anv_blorp_execute_on_companion(cmd_buffer, dst_image)) {
if (anv_blorp_execute_on_companion(cmd_buffer, src_image, dst_image)) {
rcs_done = record_main_rcs_cmd_buffer_done(cmd_buffer);
cmd_buffer = cmd_buffer->companion_rcs_cmd_buffer;
}
@@ -753,7 +836,7 @@ void anv_CmdCopyBufferToImage2(
UNUSED struct anv_state rcs_done = ANV_STATE_NULL;
bool blorp_execute_on_companion =
anv_blorp_execute_on_companion(cmd_buffer, dst_image);
anv_blorp_execute_on_companion(cmd_buffer, NULL, dst_image);
/* Check if any one of the aspects is incompatible with the blitter engine,
* if true, use the companion RCS command buffer for blit operation since 3
@@ -844,7 +927,7 @@ void anv_CmdCopyImageToBuffer2(
UNUSED struct anv_state rcs_done = ANV_STATE_NULL;
bool blorp_execute_on_companion =
anv_blorp_execute_on_companion(cmd_buffer, src_image);
anv_blorp_execute_on_companion(cmd_buffer, src_image, NULL);
/* Check if any one of the aspects is incompatible with the blitter engine,
* if true, use the companion RCS command buffer for blit operation since 3
@@ -1500,7 +1583,7 @@ void anv_CmdClearColorImage(
struct anv_cmd_buffer *main_cmd_buffer = cmd_buffer;
UNUSED struct anv_state rcs_done = ANV_STATE_NULL;
if (anv_blorp_execute_on_companion(cmd_buffer, image)) {
if (anv_blorp_execute_on_companion(cmd_buffer, NULL, image)) {
rcs_done = record_main_rcs_cmd_buffer_done(cmd_buffer);
cmd_buffer = cmd_buffer->companion_rcs_cmd_buffer;
}