diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index a918586aca8..49f27467b90 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -2201,7 +2201,9 @@ static int gfx9_compute_surface(struct ac_addrlib *addrlib, const struct radeon_
    AddrSurfInfoIn.flags.depth = (surf->flags & RADEON_SURF_ZBUFFER) != 0;
    AddrSurfInfoIn.flags.display = get_display_flag(config, surf);
    /* flags.texture currently refers to TC-compatible HTILE */
-   AddrSurfInfoIn.flags.texture = is_color_surface || surf->flags & RADEON_SURF_TC_COMPATIBLE_HTILE;
+   AddrSurfInfoIn.flags.texture = !(surf->flags & RADEON_SURF_NO_TEXTURE) &&
+                                  (is_color_surface ||
+                                   surf->flags & RADEON_SURF_TC_COMPATIBLE_HTILE);
    AddrSurfInfoIn.flags.opt4space = 1;
    AddrSurfInfoIn.flags.prt = (surf->flags & RADEON_SURF_PRT) != 0;
 
diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h
index 35fb27fb487..c8d3da7325c 100644
--- a/src/amd/common/ac_surface.h
+++ b/src/amd/common/ac_surface.h
@@ -89,6 +89,10 @@ enum radeon_micro_mode
 #define RADEON_SURF_FORCE_MICRO_TILE_MODE (1ull << 31)
 #define RADEON_SURF_PRT                   (1ull << 32)
 #define RADEON_SURF_VRS_RATE              (1ull << 33)
+/* Block compressed + linear format is not supported in addrlib. These surface can be
+ * used as transfer resource. This flag indicates not to set flags.texture flag in
+ * gfx9_compute_surface(). */
+#define RADEON_SURF_NO_TEXTURE            (1ull << 34)
 
 struct legacy_surf_level {
    uint32_t offset_256B;   /* divided by 256, the hw can only do 40-bit addresses */