OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

amd/surface: add RADEON_SURF_NO_TEXTURE flag

Browse Source 
Block compressed + linear format is not supported in addrlib. But these
surface can be used as transfer resource. RADEON_SURF_NO_TEXTURE flag
indicates not to set flags.texture flag in gfx9_compute_surface().

This will help to fix the vkCreateImage() crash where block
compressed + linear format image is requested.

v2: combine RADEON_SURF_NO_TEXTURE to below line (Marek Olšák)
v1: add RADEON_SURF_NO_TEXTURE flag (Marek Olšák)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21422>
This commit is contained in:
Yogesh Mohan Marimuthu
2023-02-21 14:57:49 +05:30
committed by Marge Bot
parent becc1c5615
commit de0885cdb8
2 changed files with 7 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/amd/common/ac_surface.c
View File

@@ -2201,7 +2201,9 @@ static int gfx9_compute_surface(struct ac_addrlib *addrlib, const struct radeon_
AddrSurfInfoIn.flags.depth = (surf->flags & RADEON_SURF_ZBUFFER) != 0;
AddrSurfInfoIn.flags.display = get_display_flag(config, surf);
/* flags.texture currently refers to TC-compatible HTILE */
AddrSurfInfoIn.flags.texture = is_color_surface || surf->flags & RADEON_SURF_TC_COMPATIBLE_HTILE;
AddrSurfInfoIn.flags.texture = !(surf->flags & RADEON_SURF_NO_TEXTURE) &&
(is_color_surface ||
surf->flags & RADEON_SURF_TC_COMPATIBLE_HTILE);
AddrSurfInfoIn.flags.opt4space = 1;
AddrSurfInfoIn.flags.prt = (surf->flags & RADEON_SURF_PRT) != 0;

4
src/amd/common/ac_surface.h
View File

@@ -89,6 +89,10 @@ enum radeon_micro_mode
#define RADEON_SURF_FORCE_MICRO_TILE_MODE (1ull << 31)
#define RADEON_SURF_PRT (1ull << 32)
#define RADEON_SURF_VRS_RATE (1ull << 33)
/* Block compressed + linear format is not supported in addrlib. These surface can be
* used as transfer resource. This flag indicates not to set flags.texture flag in
* gfx9_compute_surface(). */
#define RADEON_SURF_NO_TEXTURE (1ull << 34)
struct legacy_surf_level {
uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */