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intel: Rename vk_to_gen keyword to vk_to_intel

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export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965
grep -E "vk_to_gen" -rIl $SEARCH_PATH | xargs sed -ie "s/vk_to_gen/vk_to_intel/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10241>
This commit is contained in:
Anuj Phogat
2021-04-19 15:50:14 -07:00
committed by Marge Bot
parent 8b86cc8b5c
commit dde7ac7f3f
7 changed files with 92 additions and 92 deletions
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62
src/intel/vulkan/genX_pipeline.c
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@@ -558,20 +558,20 @@ gfx7_ms_rast_mode(struct anv_graphics_pipeline *pipeline,
}
#endif
const uint32_t genX(vk_to_gen_cullmode)[] = {
const uint32_t genX(vk_to_intel_cullmode)[] = {
[VK_CULL_MODE_NONE] = CULLMODE_NONE,
[VK_CULL_MODE_FRONT_BIT] = CULLMODE_FRONT,
[VK_CULL_MODE_BACK_BIT] = CULLMODE_BACK,
[VK_CULL_MODE_FRONT_AND_BACK] = CULLMODE_BOTH
};
const uint32_t genX(vk_to_gen_fillmode)[] = {
const uint32_t genX(vk_to_intel_fillmode)[] = {
[VK_POLYGON_MODE_FILL] = FILL_MODE_SOLID,
[VK_POLYGON_MODE_LINE] = FILL_MODE_WIREFRAME,
[VK_POLYGON_MODE_POINT] = FILL_MODE_POINT,
};
const uint32_t genX(vk_to_gen_front_face)[] = {
const uint32_t genX(vk_to_intel_front_face)[] = {
[VK_FRONT_FACE_COUNTER_CLOCKWISE] = 1,
[VK_FRONT_FACE_CLOCKWISE] = 0
};
@@ -695,13 +695,13 @@ emit_rs_state(struct anv_graphics_pipeline *pipeline,
raster.FrontWinding =
dynamic_states & ANV_CMD_DIRTY_DYNAMIC_FRONT_FACE ?
0 : genX(vk_to_gen_front_face)[rs_info->frontFace];
0 : genX(vk_to_intel_front_face)[rs_info->frontFace];
raster.CullMode =
dynamic_states & ANV_CMD_DIRTY_DYNAMIC_CULL_MODE ?
0 : genX(vk_to_gen_cullmode)[rs_info->cullMode];
0 : genX(vk_to_intel_cullmode)[rs_info->cullMode];
raster.FrontFaceFillMode = genX(vk_to_gen_fillmode)[rs_info->polygonMode];
raster.BackFaceFillMode = genX(vk_to_gen_fillmode)[rs_info->polygonMode];
raster.FrontFaceFillMode = genX(vk_to_intel_fillmode)[rs_info->polygonMode];
raster.BackFaceFillMode = genX(vk_to_intel_fillmode)[rs_info->polygonMode];
raster.ScissorRectangleEnable = true;
#if GFX_VER >= 9
@@ -806,7 +806,7 @@ emit_ms_state(struct anv_graphics_pipeline *pipeline,
}
}
static const uint32_t vk_to_gen_logic_op[] = {
static const uint32_t vk_to_intel_logic_op[] = {
[VK_LOGIC_OP_COPY] = LOGICOP_COPY,
[VK_LOGIC_OP_CLEAR] = LOGICOP_CLEAR,
[VK_LOGIC_OP_AND] = LOGICOP_AND,
@@ -825,7 +825,7 @@ static const uint32_t vk_to_gen_logic_op[] = {
[VK_LOGIC_OP_SET] = LOGICOP_SET,
};
static const uint32_t vk_to_gen_blend[] = {
static const uint32_t vk_to_intel_blend[] = {
[VK_BLEND_FACTOR_ZERO] = BLENDFACTOR_ZERO,
[VK_BLEND_FACTOR_ONE] = BLENDFACTOR_ONE,
[VK_BLEND_FACTOR_SRC_COLOR] = BLENDFACTOR_SRC_COLOR,
@@ -847,7 +847,7 @@ static const uint32_t vk_to_gen_blend[] = {
[VK_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA] = BLENDFACTOR_INV_SRC1_ALPHA,
};
static const uint32_t vk_to_gen_blend_op[] = {
static const uint32_t vk_to_intel_blend_op[] = {
[VK_BLEND_OP_ADD] = BLENDFUNCTION_ADD,
[VK_BLEND_OP_SUBTRACT] = BLENDFUNCTION_SUBTRACT,
[VK_BLEND_OP_REVERSE_SUBTRACT] = BLENDFUNCTION_REVERSE_SUBTRACT,
@@ -855,7 +855,7 @@ static const uint32_t vk_to_gen_blend_op[] = {
[VK_BLEND_OP_MAX] = BLENDFUNCTION_MAX,
};
const uint32_t genX(vk_to_gen_compare_op)[] = {
const uint32_t genX(vk_to_intel_compare_op)[] = {
[VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER,
[VK_COMPARE_OP_LESS] = PREFILTEROPLESS,
[VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL,
@@ -866,7 +866,7 @@ const uint32_t genX(vk_to_gen_compare_op)[] = {
[VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS,
};
const uint32_t genX(vk_to_gen_stencil_op)[] = {
const uint32_t genX(vk_to_intel_stencil_op)[] = {
[VK_STENCIL_OP_KEEP] = STENCILOP_KEEP,
[VK_STENCIL_OP_ZERO] = STENCILOP_ZERO,
[VK_STENCIL_OP_REPLACE] = STENCILOP_REPLACE,
@@ -877,7 +877,7 @@ const uint32_t genX(vk_to_gen_stencil_op)[] = {
[VK_STENCIL_OP_DECREMENT_AND_WRAP] = STENCILOP_DECR,
};
const uint32_t genX(vk_to_gen_primitive_type)[] = {
const uint32_t genX(vk_to_intel_primitive_type)[] = {
[VK_PRIMITIVE_TOPOLOGY_POINT_LIST] = _3DPRIM_POINTLIST,
[VK_PRIMITIVE_TOPOLOGY_LINE_LIST] = _3DPRIM_LINELIST,
[VK_PRIMITIVE_TOPOLOGY_LINE_STRIP] = _3DPRIM_LINESTRIP,
@@ -1081,7 +1081,7 @@ emit_ds_state(struct anv_graphics_pipeline *pipeline,
.DepthTestFunction =
dynamic_states & ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP ?
0 : genX(vk_to_gen_compare_op)[info.depthCompareOp],
0 : genX(vk_to_intel_compare_op)[info.depthCompareOp],
.DoubleSidedStencilEnable = true,
@@ -1089,14 +1089,14 @@ emit_ds_state(struct anv_graphics_pipeline *pipeline,
dynamic_states & ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE ?
0 : info.stencilTestEnable,
.StencilFailOp = genX(vk_to_gen_stencil_op)[info.front.failOp],
.StencilPassDepthPassOp = genX(vk_to_gen_stencil_op)[info.front.passOp],
.StencilPassDepthFailOp = genX(vk_to_gen_stencil_op)[info.front.depthFailOp],
.StencilTestFunction = genX(vk_to_gen_compare_op)[info.front.compareOp],
.BackfaceStencilFailOp = genX(vk_to_gen_stencil_op)[info.back.failOp],
.BackfaceStencilPassDepthPassOp = genX(vk_to_gen_stencil_op)[info.back.passOp],
.BackfaceStencilPassDepthFailOp = genX(vk_to_gen_stencil_op)[info.back.depthFailOp],
.BackfaceStencilTestFunction = genX(vk_to_gen_compare_op)[info.back.compareOp],
.StencilFailOp = genX(vk_to_intel_stencil_op)[info.front.failOp],
.StencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[info.front.passOp],
.StencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[info.front.depthFailOp],
.StencilTestFunction = genX(vk_to_intel_compare_op)[info.front.compareOp],
.BackfaceStencilFailOp = genX(vk_to_intel_stencil_op)[info.back.failOp],
.BackfaceStencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[info.back.passOp],
.BackfaceStencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[info.back.depthFailOp],
.BackfaceStencilTestFunction = genX(vk_to_intel_compare_op)[info.back.compareOp],
};
if (dynamic_stencil_op) {
@@ -1191,7 +1191,7 @@ emit_cb_state(struct anv_graphics_pipeline *pipeline,
.AlphaToOneEnable = ms_info && ms_info->alphaToOneEnable,
#endif
.LogicOpEnable = info->logicOpEnable,
.LogicOpFunction = vk_to_gen_logic_op[info->logicOp],
.LogicOpFunction = vk_to_intel_logic_op[info->logicOp],
/* Vulkan specification 1.2.168, VkLogicOp:
*
* "Logical operations are controlled by the logicOpEnable and
@@ -1211,12 +1211,12 @@ emit_cb_state(struct anv_graphics_pipeline *pipeline,
.ColorClampRange = COLORCLAMP_RTFORMAT,
.PreBlendColorClampEnable = true,
.PostBlendColorClampEnable = true,
.SourceBlendFactor = vk_to_gen_blend[a->srcColorBlendFactor],
.DestinationBlendFactor = vk_to_gen_blend[a->dstColorBlendFactor],
.ColorBlendFunction = vk_to_gen_blend_op[a->colorBlendOp],
.SourceAlphaBlendFactor = vk_to_gen_blend[a->srcAlphaBlendFactor],
.DestinationAlphaBlendFactor = vk_to_gen_blend[a->dstAlphaBlendFactor],
.AlphaBlendFunction = vk_to_gen_blend_op[a->alphaBlendOp],
.SourceBlendFactor = vk_to_intel_blend[a->srcColorBlendFactor],
.DestinationBlendFactor = vk_to_intel_blend[a->dstColorBlendFactor],
.ColorBlendFunction = vk_to_intel_blend_op[a->colorBlendOp],
.SourceAlphaBlendFactor = vk_to_intel_blend[a->srcAlphaBlendFactor],
.DestinationAlphaBlendFactor = vk_to_intel_blend[a->dstAlphaBlendFactor],
.AlphaBlendFunction = vk_to_intel_blend_op[a->alphaBlendOp],
.WriteDisableAlpha = !(a->colorWriteMask & VK_COLOR_COMPONENT_A_BIT),
.WriteDisableRed = !(a->colorWriteMask & VK_COLOR_COMPONENT_R_BIT),
.WriteDisableGreen = !(a->colorWriteMask & VK_COLOR_COMPONENT_G_BIT),
@@ -1377,8 +1377,8 @@ emit_3dstate_clip(struct anv_graphics_pipeline *pipeline,
!(last->vue_map.slots_valid & VARYING_BIT_LAYER);
#if GFX_VER == 7
clip.FrontWinding = genX(vk_to_gen_front_face)[rs_info->frontFace];
clip.CullMode = genX(vk_to_gen_cullmode)[rs_info->cullMode];
clip.FrontWinding = genX(vk_to_intel_front_face)[rs_info->frontFace];
clip.CullMode = genX(vk_to_intel_cullmode)[rs_info->cullMode];
clip.ViewportZClipTestEnable = pipeline->depth_clip_enable;
clip.UserClipDistanceClipTestEnableBitmask = last->clip_distance_mask;
clip.UserClipDistanceCullTestEnableBitmask = last->cull_distance_mask;