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radv: remove is_internal pipeline creation parameter

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Instead, check if the cache is the meta shader cache. This catches the
shaders created by radv_create_radix_sort_u64().

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21606>
This commit is contained in:
Rhys Perry
2023-02-28 19:33:23 +00:00
committed by Marge Bot
parent 9905322df9
commit dc01f03d1b
20 changed files with 54 additions and 60 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/amd/vulkan/radv_acceleration_structure.c
View File

@@ -398,7 +398,7 @@ create_build_pipeline_spv(struct radv_device *device, const uint32_t *spv, uint3
};
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&pipeline_info, &device->meta_state.alloc, pipeline, true);
&pipeline_info, &device->meta_state.alloc, pipeline);
cleanup:
device->vk.dispatch_table.DestroyShaderModule(radv_device_to_handle(device), module,

2
src/amd/vulkan/radv_device_generated_commands.c
View File

@@ -965,7 +965,7 @@ radv_device_init_dgc_prepare_state(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&pipeline_info, &device->meta_state.alloc,
&device->meta_state.dgc_prepare.pipeline, true);
&device->meta_state.dgc_prepare.pipeline);
if (result != VK_SUCCESS)
goto cleanup;

2
src/amd/vulkan/radv_meta_blit.c
View File

@@ -772,7 +772,7 @@ build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
result = radv_graphics_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, pipeline, true);
&device->meta_state.alloc, pipeline);
ralloc_free(vs);
ralloc_free(fs);
mtx_unlock(&device->meta_state.mtx);

6
src/amd/vulkan/radv_meta_blit2d.c
View File

@@ -719,7 +719,7 @@ blit2d_init_color_pipeline(struct radv_device *device, enum blit2d_src_type src_
result = radv_graphics_pipeline_create(
radv_device_to_handle(device), device->meta_state.cache, &vk_pipeline_info,
&radv_pipeline_info, &device->meta_state.alloc,
&device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key], true);
&device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key]);
ralloc_free(vs);
ralloc_free(fs);
@@ -876,7 +876,7 @@ blit2d_init_depth_only_pipeline(struct radv_device *device, enum blit2d_src_type
result = radv_graphics_pipeline_create(
radv_device_to_handle(device), device->meta_state.cache, &vk_pipeline_info,
&radv_pipeline_info, &device->meta_state.alloc,
&device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type], true);
&device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type]);
ralloc_free(vs);
ralloc_free(fs);
@@ -1030,7 +1030,7 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device, enum blit2d_src_ty
result = radv_graphics_pipeline_create(
radv_device_to_handle(device), device->meta_state.cache, &vk_pipeline_info,
&radv_pipeline_info, &device->meta_state.alloc,
&device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type], true);
&device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type]);
ralloc_free(vs);
ralloc_free(fs);

4
src/amd/vulkan/radv_meta_buffer.c
View File

@@ -119,7 +119,7 @@ radv_device_init_meta_buffer_state(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&fill_vk_pipeline_info, NULL,
&device->meta_state.buffer.fill_pipeline, true);
&device->meta_state.buffer.fill_pipeline);
if (result != VK_SUCCESS)
goto fail;
@@ -140,7 +140,7 @@ radv_device_init_meta_buffer_state(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&copy_vk_pipeline_info, NULL,
&device->meta_state.buffer.copy_pipeline, true);
&device->meta_state.buffer.copy_pipeline);
if (result != VK_SUCCESS)
goto fail;

24
src/amd/vulkan/radv_meta_bufimage.c
View File

@@ -139,8 +139,7 @@ radv_device_init_meta_itob_state(struct radv_device *device)
};
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, NULL, &device->meta_state.itob.pipeline,
true);
&vk_pipeline_info, NULL, &device->meta_state.itob.pipeline);
if (result != VK_SUCCESS)
goto fail;
@@ -161,7 +160,7 @@ radv_device_init_meta_itob_state(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info_3d, NULL,
&device->meta_state.itob.pipeline_3d, true);
&device->meta_state.itob.pipeline_3d);
if (result != VK_SUCCESS)
goto fail;
@@ -299,8 +298,7 @@ radv_device_init_meta_btoi_state(struct radv_device *device)
};
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, NULL, &device->meta_state.btoi.pipeline,
true);
&vk_pipeline_info, NULL, &device->meta_state.btoi.pipeline);
if (result != VK_SUCCESS)
goto fail;
@@ -321,7 +319,7 @@ radv_device_init_meta_btoi_state(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info_3d, NULL,
&device->meta_state.btoi.pipeline_3d, true);
&device->meta_state.btoi.pipeline_3d);
ralloc_free(cs_3d);
ralloc_free(cs);
@@ -458,7 +456,7 @@ radv_device_init_meta_btoi_r32g32b32_state(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, NULL,
&device->meta_state.btoi_r32g32b32.pipeline, true);
&device->meta_state.btoi_r32g32b32.pipeline);
fail:
ralloc_free(cs);
@@ -558,7 +556,7 @@ create_itoi_pipeline(struct radv_device *device, int samples, VkPipeline *pipeli
};
result = radv_compute_pipeline_create(radv_device_to_handle(device), state->cache,
&vk_pipeline_info, NULL, pipeline, true);
&vk_pipeline_info, NULL, pipeline);
ralloc_free(cs);
return result;
}
@@ -636,7 +634,7 @@ radv_device_init_meta_itoi_state(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info_3d, NULL,
&device->meta_state.itoi.pipeline_3d, true);
&device->meta_state.itoi.pipeline_3d);
ralloc_free(cs_3d);
return VK_SUCCESS;
@@ -781,7 +779,7 @@ radv_device_init_meta_itoi_r32g32b32_state(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, NULL,
&device->meta_state.itoi_r32g32b32.pipeline, true);
&device->meta_state.itoi_r32g32b32.pipeline);
fail:
ralloc_free(cs);
@@ -860,7 +858,7 @@ create_cleari_pipeline(struct radv_device *device, int samples, VkPipeline *pipe
};
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, NULL, pipeline, true);
&vk_pipeline_info, NULL, pipeline);
ralloc_free(cs);
return result;
}
@@ -933,7 +931,7 @@ radv_device_init_meta_cleari_state(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info_3d, NULL,
&device->meta_state.cleari.pipeline_3d, true);
&device->meta_state.cleari.pipeline_3d);
ralloc_free(cs_3d);
return VK_SUCCESS;
@@ -1051,7 +1049,7 @@ radv_device_init_meta_cleari_r32g32b32_state(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, NULL,
&device->meta_state.cleari_r32g32b32.pipeline, true);
&device->meta_state.cleari_r32g32b32.pipeline);
fail:
ralloc_free(cs);

6
src/amd/vulkan/radv_meta_clear.c
View File

@@ -162,7 +162,7 @@ create_pipeline(struct radv_device *device, uint32_t samples,
.renderPass = VK_NULL_HANDLE,
.subpass = 0,
},
extra, alloc, pipeline, true);
extra, alloc, pipeline);
ralloc_free(vs_nir);
ralloc_free(fs_nir);
@@ -955,7 +955,7 @@ init_meta_clear_htile_mask_state(struct radv_device *device)
result =
radv_compute_pipeline_create(radv_device_to_handle(device), state->cache, &pipeline_info,
NULL, &state->clear_htile_mask_pipeline, true);
NULL, &state->clear_htile_mask_pipeline);
fail:
ralloc_free(cs);
@@ -1034,7 +1034,7 @@ create_dcc_comp_to_single_pipeline(struct radv_device *device, bool is_msaa, VkP
};
result = radv_compute_pipeline_create(radv_device_to_handle(device), state->cache,
&pipeline_info, NULL, pipeline, true);
&pipeline_info, NULL, pipeline);
ralloc_free(cs);
return result;

2
src/amd/vulkan/radv_meta_copy_vrs_htile.c
View File

@@ -188,7 +188,7 @@ radv_device_init_meta_copy_vrs_htile_state(struct radv_device *device,
result =
radv_compute_pipeline_create(radv_device_to_handle(device), state->cache, &pipeline_info,
NULL, &state->copy_vrs_htile_pipeline, true);
NULL, &state->copy_vrs_htile_pipeline);
fail:
ralloc_free(cs);
return result;

2
src/amd/vulkan/radv_meta_dcc_retile.c
View File

@@ -168,7 +168,7 @@ radv_device_init_meta_dcc_retile_state(struct radv_device *device, struct radeon
result = radv_compute_pipeline_create(
radv_device_to_handle(device), device->meta_state.cache, &vk_pipeline_info, NULL,
&device->meta_state.dcc_retile.pipeline[surf->u.gfx9.swizzle_mode], true);
&device->meta_state.dcc_retile.pipeline[surf->u.gfx9.swizzle_mode]);
if (result != VK_SUCCESS)
goto cleanup;

2
src/amd/vulkan/radv_meta_decompress.c
View File

@@ -291,7 +291,7 @@ create_pipeline(struct radv_device *device, uint32_t samples, VkPipelineLayout l
};
result = radv_graphics_pipeline_create(device_h, device->meta_state.cache, &pipeline_create_info,
&extra, &device->meta_state.alloc, pipeline, true);
&extra, &device->meta_state.alloc, pipeline);
cleanup:
ralloc_free(fs_module);

2
src/amd/vulkan/radv_meta_etc_decode.c
View File

@@ -565,7 +565,7 @@ create_decode_pipeline(struct radv_device *device, VkPipeline *pipeline)
};
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, NULL, pipeline, true);
&vk_pipeline_info, NULL, pipeline);
if (result != VK_SUCCESS)
goto fail;

11
src/amd/vulkan/radv_meta_fast_clear.c
View File

@@ -137,7 +137,7 @@ create_dcc_compress_compute(struct radv_device *device)
result = radv_compute_pipeline_create(
radv_device_to_handle(device), device->meta_state.cache, &vk_pipeline_info, NULL,
&device->meta_state.fast_clear_flush.dcc_decompress_compute_pipeline, true);
&device->meta_state.fast_clear_flush.dcc_decompress_compute_pipeline);
if (result != VK_SUCCESS)
goto cleanup;
@@ -274,8 +274,7 @@ create_pipeline(struct radv_device *device, VkShaderModule vs_module_h, VkPipeli
.use_rectlist = true,
.custom_blend_mode = V_028808_CB_ELIMINATE_FAST_CLEAR,
},
&device->meta_state.alloc, &device->meta_state.fast_clear_flush.cmask_eliminate_pipeline,
true);
&device->meta_state.alloc, &device->meta_state.fast_clear_flush.cmask_eliminate_pipeline);
if (result != VK_SUCCESS)
goto cleanup;
@@ -325,8 +324,7 @@ create_pipeline(struct radv_device *device, VkShaderModule vs_module_h, VkPipeli
.use_rectlist = true,
.custom_blend_mode = V_028808_CB_FMASK_DECOMPRESS,
},
&device->meta_state.alloc, &device->meta_state.fast_clear_flush.fmask_decompress_pipeline,
true);
&device->meta_state.alloc, &device->meta_state.fast_clear_flush.fmask_decompress_pipeline);
if (result != VK_SUCCESS)
goto cleanup;
@@ -378,8 +376,7 @@ create_pipeline(struct radv_device *device, VkShaderModule vs_module_h, VkPipeli
? V_028808_CB_DCC_DECOMPRESS_GFX11
: V_028808_CB_DCC_DECOMPRESS_GFX8,
},
&device->meta_state.alloc, &device->meta_state.fast_clear_flush.dcc_decompress_pipeline,
true);
&device->meta_state.alloc, &device->meta_state.fast_clear_flush.dcc_decompress_pipeline);
if (result != VK_SUCCESS)
goto cleanup;

2
src/amd/vulkan/radv_meta_fmask_copy.c
View File

@@ -142,7 +142,7 @@ create_fmask_copy_pipeline(struct radv_device *device, int samples, VkPipeline *
};
result = radv_compute_pipeline_create(radv_device_to_handle(device), state->cache,
&vk_pipeline_info, NULL, pipeline, true);
&vk_pipeline_info, NULL, pipeline);
ralloc_free(cs);
return result;
}

2
src/amd/vulkan/radv_meta_fmask_expand.c
View File

@@ -197,7 +197,7 @@ create_fmask_expand_pipeline(struct radv_device *device, int samples, VkPipeline
};
result = radv_compute_pipeline_create(radv_device_to_handle(device), state->cache,
&vk_pipeline_info, NULL, pipeline, true);
&vk_pipeline_info, NULL, pipeline);
ralloc_free(cs);
return result;

2
src/amd/vulkan/radv_meta_resolve.c
View File

@@ -174,7 +174,7 @@ create_pipeline(struct radv_device *device, VkShaderModule vs_module_h, VkFormat
.use_rectlist = true,
.custom_blend_mode = V_028808_CB_RESOLVE,
},
&device->meta_state.alloc, pipeline, true);
&device->meta_state.alloc, pipeline);
if (result != VK_SUCCESS)
goto cleanup;

4
src/amd/vulkan/radv_meta_resolve_cs.c
View File

@@ -282,7 +282,7 @@ create_resolve_pipeline(struct radv_device *device, int samples, bool is_integer
};
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, NULL, pipeline, true);
&vk_pipeline_info, NULL, pipeline);
if (result != VK_SUCCESS)
goto fail;
@@ -327,7 +327,7 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device, int samples, i
};
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, NULL, pipeline, true);
&vk_pipeline_info, NULL, pipeline);
if (result != VK_SUCCESS)
goto fail;

4
src/amd/vulkan/radv_meta_resolve_fs.c
View File

@@ -220,7 +220,7 @@ create_resolve_pipeline(struct radv_device *device, int samples_log2, VkFormat f
result = radv_graphics_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, pipeline, true);
&device->meta_state.alloc, pipeline);
ralloc_free(vs);
ralloc_free(fs);
@@ -476,7 +476,7 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device, int samples_lo
result = radv_graphics_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, pipeline, true);
&device->meta_state.alloc, pipeline);
ralloc_free(vs);
ralloc_free(fs);

20
src/amd/vulkan/radv_pipeline.c
View File

@@ -5126,8 +5126,7 @@ VkResult
radv_graphics_pipeline_create(VkDevice _device, VkPipelineCache _cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct radv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *pAllocator, VkPipeline *pPipeline,
bool is_internal)
const VkAllocationCallbacks *pAllocator, VkPipeline *pPipeline)
{
RADV_FROM_HANDLE(radv_device, device, _device);
RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache);
@@ -5140,7 +5139,7 @@ radv_graphics_pipeline_create(VkDevice _device, VkPipelineCache _cache,
return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
radv_pipeline_init(device, &pipeline->base, RADV_PIPELINE_GRAPHICS);
pipeline->base.is_internal = is_internal;
pipeline->base.is_internal = _cache == device->meta_state.cache;
result = radv_graphics_pipeline_init(pipeline, device, cache, pCreateInfo, extra);
if (result != VK_SUCCESS) {
@@ -5149,7 +5148,8 @@ radv_graphics_pipeline_create(VkDevice _device, VkPipelineCache _cache,
}
*pPipeline = radv_pipeline_to_handle(&pipeline->base);
radv_rmv_log_graphics_pipeline_create(device, pCreateInfo->flags, &pipeline->base, is_internal);
radv_rmv_log_graphics_pipeline_create(device, pCreateInfo->flags, &pipeline->base,
pipeline->base.is_internal);
return VK_SUCCESS;
}
@@ -5265,7 +5265,7 @@ radv_CreateGraphicsPipelines(VkDevice _device, VkPipelineCache pipelineCache, ui
pAllocator, &pPipelines[i]);
} else {
r = radv_graphics_pipeline_create(_device, pipelineCache, &pCreateInfos[i], NULL,
pAllocator, &pPipelines[i], false);
pAllocator, &pPipelines[i]);
}
if (r != VK_SUCCESS) {
result = r;
@@ -5520,8 +5520,7 @@ done:
VkResult
radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
const VkComputePipelineCreateInfo *pCreateInfo,
const VkAllocationCallbacks *pAllocator, VkPipeline *pPipeline,
bool is_internal)
const VkAllocationCallbacks *pAllocator, VkPipeline *pPipeline)
{
RADV_FROM_HANDLE(radv_device, device, _device);
RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache);
@@ -5536,7 +5535,7 @@ radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
}
radv_pipeline_init(device, &pipeline->base, RADV_PIPELINE_COMPUTE);
pipeline->base.is_internal = is_internal;
pipeline->base.is_internal = _cache == device->meta_state.cache;
const VkPipelineCreationFeedbackCreateInfo *creation_feedback =
vk_find_struct_const(pCreateInfo->pNext, PIPELINE_CREATION_FEEDBACK_CREATE_INFO);
@@ -5554,7 +5553,8 @@ radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
radv_compute_pipeline_init(pipeline, pipeline_layout);
*pPipeline = radv_pipeline_to_handle(&pipeline->base);
radv_rmv_log_compute_pipeline_create(device, pCreateInfo->flags, &pipeline->base, is_internal);
radv_rmv_log_compute_pipeline_create(device, pCreateInfo->flags, &pipeline->base,
pipeline->base.is_internal);
return VK_SUCCESS;
}
@@ -5569,7 +5569,7 @@ radv_create_compute_pipelines(VkDevice _device, VkPipelineCache pipelineCache, u
for (; i < count; i++) {
VkResult r;
r = radv_compute_pipeline_create(_device, pipelineCache, &pCreateInfos[i], pAllocator,
&pPipelines[i], false);
&pPipelines[i]);
if (r != VK_SUCCESS) {
result = r;
pPipelines[i] = VK_NULL_HANDLE;

5
src/amd/vulkan/radv_private.h
View File

@@ -2325,13 +2325,12 @@ void radv_pipeline_init(struct radv_device *device, struct radv_pipeline *pipeli
VkResult radv_graphics_pipeline_create(VkDevice device, VkPipelineCache cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct radv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc, VkPipeline *pPipeline,
bool is_internal);
const VkAllocationCallbacks *alloc, VkPipeline *pPipeline);
VkResult radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
const VkComputePipelineCreateInfo *pCreateInfo,
const VkAllocationCallbacks *pAllocator,
VkPipeline *pPipeline, bool is_internal);
VkPipeline *pPipeline);
bool radv_pipeline_capture_shader_stats(const struct radv_device *device,
VkPipelineCreateFlags flags);

10
src/amd/vulkan/radv_query.c
View File

@@ -819,7 +819,7 @@ radv_device_init_meta_query_state_internal(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&occlusion_vk_pipeline_info, NULL,
&device->meta_state.query.occlusion_query_pipeline, true);
&device->meta_state.query.occlusion_query_pipeline);
if (result != VK_SUCCESS)
goto fail;
@@ -841,7 +841,7 @@ radv_device_init_meta_query_state_internal(struct radv_device *device)
result = radv_compute_pipeline_create(
radv_device_to_handle(device), device->meta_state.cache,
&pipeline_statistics_vk_pipeline_info, NULL,
&device->meta_state.query.pipeline_statistics_query_pipeline, true);
&device->meta_state.query.pipeline_statistics_query_pipeline);
if (result != VK_SUCCESS)
goto fail;
@@ -862,7 +862,7 @@ radv_device_init_meta_query_state_internal(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&tfb_pipeline_info, NULL,
&device->meta_state.query.tfb_query_pipeline, true);
&device->meta_state.query.tfb_query_pipeline);
if (result != VK_SUCCESS)
goto fail;
@@ -883,7 +883,7 @@ radv_device_init_meta_query_state_internal(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&timestamp_pipeline_info, NULL,
&device->meta_state.query.timestamp_query_pipeline, true);
&device->meta_state.query.timestamp_query_pipeline);
if (result != VK_SUCCESS)
goto fail;
@@ -904,7 +904,7 @@ radv_device_init_meta_query_state_internal(struct radv_device *device)
result = radv_compute_pipeline_create(radv_device_to_handle(device), device->meta_state.cache,
&pg_pipeline_info, NULL,
&device->meta_state.query.pg_query_pipeline, true);
&device->meta_state.query.pg_query_pipeline);
fail:
ralloc_free(occlusion_cs);