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intel/eu: Set flag [sub]register number differently for 3src

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Prior to gen8, the flag [sub]register number is in a different spot on
3src instructions than on other instructions.  Starting with Broadwell,
they made it consistent.  This commit fixes bugs that occur when a
conditional modifier gets propagated into a 3src instruction such as a
MAD.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Jason Ekstrand
2018-05-29 15:28:36 -07:00
parent 2d20303e18
commit db9675f5a4
1 changed files with 10 additions and 3 deletions
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13
src/intel/compiler/brw_eu_emit.c
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@@ -701,9 +701,16 @@ brw_inst_set_state(const struct gen_device_info *devinfo,
brw_inst_set_pred_control(devinfo, insn, state->predicate); brw_inst_set_pred_control(devinfo, insn, state->predicate);
brw_inst_set_pred_inv(devinfo, insn, state->pred_inv); brw_inst_set_pred_inv(devinfo, insn, state->pred_inv);
brw_inst_set_flag_subreg_nr(devinfo, insn, state->flag_subreg % 2); if (is_3src(devinfo, brw_inst_opcode(devinfo, insn)) &&
if (devinfo->gen >= 7) state->access_mode == BRW_ALIGN_16) {
brw_inst_set_flag_reg_nr(devinfo, insn, state->flag_subreg / 2); brw_inst_set_3src_a16_flag_subreg_nr(devinfo, insn, state->flag_subreg % 2);
if (devinfo->gen >= 7)
brw_inst_set_3src_a16_flag_reg_nr(devinfo, insn, state->flag_subreg / 2);
} else {
brw_inst_set_flag_subreg_nr(devinfo, insn, state->flag_subreg % 2);
if (devinfo->gen >= 7)
brw_inst_set_flag_reg_nr(devinfo, insn, state->flag_subreg / 2);
}
if (devinfo->gen >= 6) if (devinfo->gen >= 6)
brw_inst_set_acc_wr_control(devinfo, insn, state->acc_wr_control); brw_inst_set_acc_wr_control(devinfo, insn, state->acc_wr_control);