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freedreno/a6xx: Fix name of A6XX_PC_PRIMITIVE_CNTL_0::TESS_UPPER_LEFT_DOMAIN_ORIGIN

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Document what it actually does.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
This commit is contained in:
Connor Abbott
2023-06-12 16:46:02 +02:00
committed by Marge Bot
parent 5704d0ad27
commit db1ea9f749
1 changed files with 7 additions and 2 deletions
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9
src/freedreno/registers/adreno/a6xx.xml
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@@ -2875,9 +2875,14 @@ to upconvert to 32b float internally?
<reg32 offset="0x9b00" name="PC_PRIMITIVE_CNTL_0">
<bitfield name="PRIMITIVE_RESTART" pos="0" type="boolean"/>
<!-- maybe? b1 seems always set, so just assume it is for now: -->
<bitfield name="PROVOKING_VTX_LAST" pos="1" type="boolean"/>
<bitfield name="TESS_UPPER_LEFT_DOMAIN_ORIGIN" pos="2" type="boolean"/>
<bitfield name="D3D_VERTEX_ORDERING" pos="2" type="boolean">
<doc>
Swaps TESS_CW_TRIS/TESS_CCW_TRIS, and also makes
triangle fans and triangle strips use the D3D
order instead of the OpenGL order.
</doc>
</bitfield>
<bitfield name="UNK3" pos="3" type="boolean"/>
</reg32>