intel/compiler: Make a type for Thread Payload and FS variant
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
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@@ -85,6 +85,25 @@ struct shader_stats {
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unsigned fill_count;
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};
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/** Register numbers for thread payload fields. */
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struct thread_payload {
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/** The number of thread payload registers the hardware will supply. */
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uint8_t num_regs;
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};
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struct fs_thread_payload : public thread_payload {
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uint8_t subspan_coord_reg[2];
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uint8_t source_depth_reg[2];
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uint8_t source_w_reg[2];
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uint8_t aa_dest_stencil_reg[2];
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uint8_t dest_depth_reg[2];
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uint8_t sample_pos_reg[2];
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uint8_t sample_mask_in_reg[2];
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uint8_t depth_w_coef_reg[2];
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uint8_t barycentric_coord_reg[BRW_BARYCENTRIC_MODE_COUNT][2];
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uint8_t local_invocation_id_reg[2];
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};
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/**
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* The fragment shader front-end.
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*
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@@ -392,22 +411,7 @@ public:
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bool failed;
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char *fail_msg;
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/** Register numbers for thread payload fields. */
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struct thread_payload {
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uint8_t subspan_coord_reg[2];
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uint8_t source_depth_reg[2];
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uint8_t source_w_reg[2];
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uint8_t aa_dest_stencil_reg[2];
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uint8_t dest_depth_reg[2];
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uint8_t sample_pos_reg[2];
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uint8_t sample_mask_in_reg[2];
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uint8_t depth_w_coef_reg[2];
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uint8_t barycentric_coord_reg[BRW_BARYCENTRIC_MODE_COUNT][2];
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uint8_t local_invocation_id_reg[2];
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/** The number of thread payload registers the hardware will supply. */
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uint8_t num_regs;
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} payload;
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fs_thread_payload payload;
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bool source_depth_to_render_target;
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bool runtime_check_aads_emit;
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