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radv: Expose VK_KHR_workgroup_memory_explicit_layout.

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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8752>
This commit is contained in:
Bas Nieuwenhuizen
2020-11-07 00:38:39 +01:00
parent 7d0c940d70
commit d938fcefb9
4 changed files with 16 additions and 3 deletions
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7
src/amd/vulkan/radv_shader.c
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@@ -493,6 +493,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
.vk_memory_model = true,
.vk_memory_model_device_scope = true,
.fragment_shading_rate = device->physical_device->rad_info.chip_class >= GFX10_3,
.workgroup_memory_explicit_layout = true,
},
.ubo_addr_format = nir_address_format_32bit_index_offset,
.ssbo_addr_format = nir_address_format_32bit_index_offset,
@@ -679,8 +680,10 @@ radv_shader_compile_to_nir(struct radv_device *device,
/* Lower deref operations for compute shared memory. */
if (nir->info.stage == MESA_SHADER_COMPUTE) {
NIR_PASS_V(nir, nir_lower_vars_to_explicit_types,
nir_var_mem_shared, shared_var_info);
if (!nir->info.cs.shared_memory_explicit_layout) {
NIR_PASS_V(nir, nir_lower_vars_to_explicit_types,
nir_var_mem_shared, shared_var_info);
}
NIR_PASS_V(nir, nir_lower_explicit_io,
nir_var_mem_shared, nir_address_format_32bit_offset);
}