amd/common: Move ac_export_mrt_z to ac_llvm_build.

The aim of this commit is to keep ac_shader_util LLVM-free,
since we would like to use it in ACO later.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

src/amd/common/ac_llvm_build.c

@@ -34,6 +34,7 @@
 #include <stdio.h>
 
 #include "ac_llvm_util.h"
+#include "ac_shader_util.h"
 #include "ac_exp_param.h"
 #include "util/bitscan.h"
 #include "util/macros.h"
@@ -4432,3 +4433,73 @@ LLVMValueRef ac_build_call(struct ac_llvm_context *ctx, LLVMValueRef func,
 	LLVMSetInstructionCallConv(ret, LLVMGetFunctionCallConv(func));
 	return ret;
 }
+
+void
+ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth,
+		LLVMValueRef stencil, LLVMValueRef samplemask,
+		struct ac_export_args *args)
+{
+	unsigned mask = 0;
+	unsigned format = ac_get_spi_shader_z_format(depth != NULL,
+						     stencil != NULL,
+						     samplemask != NULL);
+
+	assert(depth || stencil || samplemask);
+
+	memset(args, 0, sizeof(*args));
+
+	args->valid_mask = 1; /* whether the EXEC mask is valid */
+	args->done = 1; /* DONE bit */
+
+	/* Specify the target we are exporting */
+	args->target = V_008DFC_SQ_EXP_MRTZ;
+
+	args->compr = 0; /* COMP flag */
+	args->out[0] = LLVMGetUndef(ctx->f32); /* R, depth */
+	args->out[1] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
+	args->out[2] = LLVMGetUndef(ctx->f32); /* B, sample mask */
+	args->out[3] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
+
+	if (format == V_028710_SPI_SHADER_UINT16_ABGR) {
+		assert(!depth);
+		args->compr = 1; /* COMPR flag */
+
+		if (stencil) {
+			/* Stencil should be in X[23:16]. */
+			stencil = ac_to_integer(ctx, stencil);
+			stencil = LLVMBuildShl(ctx->builder, stencil,
+					       LLVMConstInt(ctx->i32, 16, 0), "");
+			args->out[0] = ac_to_float(ctx, stencil);
+			mask |= 0x3;
+		}
+		if (samplemask) {
+			/* SampleMask should be in Y[15:0]. */
+			args->out[1] = samplemask;
+			mask |= 0xc;
+		}
+	} else {
+		if (depth) {
+			args->out[0] = depth;
+			mask |= 0x1;
+		}
+		if (stencil) {
+			args->out[1] = stencil;
+			mask |= 0x2;
+		}
+		if (samplemask) {
+			args->out[2] = samplemask;
+			mask |= 0x4;
+		}
+	}
+
+	/* GFX6 (except OLAND and HAINAN) has a bug that it only looks
+	 * at the X writemask component. */
+	if (ctx->chip_class == GFX6 &&
+	    ctx->family != CHIP_OLAND &&
+	    ctx->family != CHIP_HAINAN)
+		mask |= 0x1;
+
+	/* Specify which components to enable */
+	args->enabled_channels = mask;
+}
+

src/amd/common/ac_llvm_build.h

@@ -740,6 +740,11 @@ LLVMValueRef ac_build_atomic_cmp_xchg(struct ac_llvm_context *ctx, LLVMValueRef
 				      LLVMValueRef cmp, LLVMValueRef val,
 				      const char *sync_scope);
 
+void
+ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth,
+		LLVMValueRef stencil, LLVMValueRef samplemask,
+		struct ac_export_args *args);
+
 #ifdef __cplusplus
 }
 #endif

src/amd/common/ac_shader_util.c

@@ -25,7 +25,6 @@
 #include <stdlib.h>
 #include <string.h>
 
-#include "ac_nir_to_llvm.h"
 #include "ac_shader_util.h"
 #include "sid.h"
 
@@ -109,71 +108,3 @@ ac_vgt_gs_mode(unsigned gs_max_vert_out, enum chip_class chip_class)
 	       S_028A40_ONCHIP(chip_class >= GFX9 ? 1 : 0);
 }
 
-void
-ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth,
-		LLVMValueRef stencil, LLVMValueRef samplemask,
-		struct ac_export_args *args)
-{
-	unsigned mask = 0;
-	unsigned format = ac_get_spi_shader_z_format(depth != NULL,
-						     stencil != NULL,
-						     samplemask != NULL);
-
-	assert(depth || stencil || samplemask);
-
-	memset(args, 0, sizeof(*args));
-
-	args->valid_mask = 1; /* whether the EXEC mask is valid */
-	args->done = 1; /* DONE bit */
-
-	/* Specify the target we are exporting */
-	args->target = V_008DFC_SQ_EXP_MRTZ;
-
-	args->compr = 0; /* COMP flag */
-	args->out[0] = LLVMGetUndef(ctx->f32); /* R, depth */
-	args->out[1] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
-	args->out[2] = LLVMGetUndef(ctx->f32); /* B, sample mask */
-	args->out[3] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
-
-	if (format == V_028710_SPI_SHADER_UINT16_ABGR) {
-		assert(!depth);
-		args->compr = 1; /* COMPR flag */
-
-		if (stencil) {
-			/* Stencil should be in X[23:16]. */
-			stencil = ac_to_integer(ctx, stencil);
-			stencil = LLVMBuildShl(ctx->builder, stencil,
-					       LLVMConstInt(ctx->i32, 16, 0), "");
-			args->out[0] = ac_to_float(ctx, stencil);
-			mask |= 0x3;
-		}
-		if (samplemask) {
-			/* SampleMask should be in Y[15:0]. */
-			args->out[1] = samplemask;
-			mask |= 0xc;
-		}
-	} else {
-		if (depth) {
-			args->out[0] = depth;
-			mask |= 0x1;
-		}
-		if (stencil) {
-			args->out[1] = stencil;
-			mask |= 0x2;
-		}
-		if (samplemask) {
-			args->out[2] = samplemask;
-			mask |= 0x4;
-		}
-	}
-
-	/* GFX6 (except OLAND and HAINAN) has a bug that it only looks
-	 * at the X writemask component. */
-	if (ctx->chip_class == GFX6 &&
-	    ctx->family != CHIP_OLAND &&
-	    ctx->family != CHIP_HAINAN)
-		mask |= 0x1;
-
-	/* Specify which components to enable */
-	args->enabled_channels = mask;
-}

src/amd/common/ac_shader_util.h

@@ -28,7 +28,6 @@
 #include <stdint.h>
 
 #include "amd_family.h"
-#include "ac_llvm_build.h"
 
 unsigned
 ac_get_spi_shader_z_format(bool writes_z, bool writes_stencil,
@@ -40,9 +39,4 @@ ac_get_cb_shader_mask(unsigned spi_shader_col_format);
 uint32_t
 ac_vgt_gs_mode(unsigned gs_max_vert_out, enum chip_class chip_class);
 
-void
-ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth,
-		LLVMValueRef stencil, LLVMValueRef samplemask,
-		struct ac_export_args *args);
-
 #endif