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radv,radeonsi: Disable compression on interop depth images

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If we want to use HTILE correctly we need to communicate extra stuff
like clear colors. (Unlike DCC there is no HTILE FCE)

CC: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6617>
This commit is contained in:
Bas Nieuwenhuizen
2020-08-14 00:58:06 +02:00
committed by Marge Bot
parent ecc19e9819
commit d78df70c2a
2 changed files with 3 additions and 1 deletions
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1
src/amd/vulkan/radv_image.c
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@@ -268,6 +268,7 @@ radv_use_htile_for_image(const struct radv_device *device,
const struct radv_image *image)
{
return image->info.levels == 1 &&
!image->shareable &&
((image->info.width * image->info.height >= 8 * 8) ||
(device->instance->debug_flags & RADV_DEBUG_FORCE_COMPRESS));
}

3
src/gallium/drivers/radeonsi/si_texture.c
View File

@@ -237,7 +237,8 @@ static int si_init_surface(struct si_screen *sscreen, struct radeon_surf *surfac
if (!is_flushed_depth && is_depth) {
flags |= RADEON_SURF_ZBUFFER;
if (sscreen->debug_flags & DBG(NO_HYPERZ)) {
if ((sscreen->debug_flags & DBG(NO_HYPERZ)) ||
(ptex->bind & PIPE_BIND_SHARED) || is_imported) {
flags |= RADEON_SURF_NO_HTILE;
} else if (tc_compatible_htile &&
(sscreen->info.chip_class >= GFX9 || array_mode == RADEON_SURF_MODE_2D)) {