From d78df70c2a85fd846d40b71b9e213122347bea1b Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Fri, 14 Aug 2020 00:58:06 +0200 Subject: [PATCH] radv,radeonsi: Disable compression on interop depth images MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If we want to use HTILE correctly we need to communicate extra stuff like clear colors. (Unlike DCC there is no HTILE FCE) CC: mesa-stable Reviewed-by: Marek Olšák Part-of: --- src/amd/vulkan/radv_image.c | 1 + src/gallium/drivers/radeonsi/si_texture.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 43ccec304bb..cc0ae660268 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -268,6 +268,7 @@ radv_use_htile_for_image(const struct radv_device *device, const struct radv_image *image) { return image->info.levels == 1 && + !image->shareable && ((image->info.width * image->info.height >= 8 * 8) || (device->instance->debug_flags & RADV_DEBUG_FORCE_COMPRESS)); } diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 448e7497be5..b66f8eba6d2 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -237,7 +237,8 @@ static int si_init_surface(struct si_screen *sscreen, struct radeon_surf *surfac if (!is_flushed_depth && is_depth) { flags |= RADEON_SURF_ZBUFFER; - if (sscreen->debug_flags & DBG(NO_HYPERZ)) { + if ((sscreen->debug_flags & DBG(NO_HYPERZ)) || + (ptex->bind & PIPE_BIND_SHARED) || is_imported) { flags |= RADEON_SURF_NO_HTILE; } else if (tc_compatible_htile && (sscreen->info.chip_class >= GFX9 || array_mode == RADEON_SURF_MODE_2D)) {