From d78389ea5fe02f74336fdedcf9f9c1ae786e4ee8 Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Fri, 19 Feb 2021 03:58:28 +0100 Subject: [PATCH] amd/common: Add retile map size helper. Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/common/ac_surface.c | 6 ++++++ src/amd/common/ac_surface.h | 1 + src/gallium/drivers/radeonsi/si_compute_blit.c | 2 +- src/gallium/drivers/radeonsi/si_texture.c | 4 +--- 4 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index c313131935c..fd534b382e4 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -2990,6 +2990,12 @@ uint64_t ac_surface_get_plane_size(const struct radeon_surf *surf, } } +uint32_t ac_surface_get_retile_map_size(const struct radeon_surf *surf) +{ + return surf->u.gfx9.dcc_retile_num_elements * + (surf->u.gfx9.dcc_retile_use_uint16 ? 2 : 4); +} + void ac_surface_print_info(FILE *out, const struct radeon_info *info, const struct radeon_surf *surf) { diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h index 596496f74bb..26feb4747b2 100644 --- a/src/amd/common/ac_surface.h +++ b/src/amd/common/ac_surface.h @@ -370,6 +370,7 @@ uint64_t ac_surface_get_plane_stride(enum chip_class chip_class, /* Of the whole miplevel, not an individual layer */ uint64_t ac_surface_get_plane_size(const struct radeon_surf *surf, unsigned plane); +uint32_t ac_surface_get_retile_map_size(const struct radeon_surf *surf); void ac_surface_print_info(FILE *out, const struct radeon_info *info, const struct radeon_surf *surf); diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c index dc28f1067ad..16a8aebd06e 100644 --- a/src/gallium/drivers/radeonsi/si_compute_blit.c +++ b/src/gallium/drivers/radeonsi/si_compute_blit.c @@ -648,7 +648,7 @@ void si_retile_dcc(struct si_context *sctx, struct si_texture *tex) img[0].format = use_uint16 ? PIPE_FORMAT_R16G16B16A16_UINT : PIPE_FORMAT_R32G32B32A32_UINT; img[0].u.buf.offset = 0; - img[0].u.buf.size = num_elements * (use_uint16 ? 2 : 4); + img[0].u.buf.size = ac_surface_get_retile_map_size(&tex->surface); img[1].format = PIPE_FORMAT_R8_UINT; img[1].u.buf.offset = tex->surface.dcc_offset; diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 9c8c1bc4b2a..d08957ddcc6 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -1077,9 +1077,7 @@ static struct si_texture *si_texture_create_object(struct pipe_screen *screen, * Use a staging buffer for the upload, because * the buffer backing the texture is unmappable. */ - bool use_uint16 = tex->surface.u.gfx9.dcc_retile_use_uint16; - unsigned num_elements = tex->surface.u.gfx9.dcc_retile_num_elements; - unsigned dcc_retile_map_size = num_elements * (use_uint16 ? 2 : 4); + uint32_t dcc_retile_map_size = ac_surface_get_retile_map_size(&tex->surface); tex->dcc_retile_buffer = si_aligned_buffer_create(screen, SI_RESOURCE_FLAG_DRIVER_INTERNAL, PIPE_USAGE_DEFAULT,