iris: Implement INTEL_DEBUG=pc for pipe control logging.

This prints a log of every PIPE_CONTROL flush we emit, noting which bits
were set, and also the reason for the flush.  That way we can see which
are caused by hardware workarounds, render-to-texture, buffer updates,
and so on.  It should make it easier to determine whether we're doing
too many flushes and why.

src/gallium/drivers/iris/iris_resource.h

@@ -267,7 +267,8 @@ uint32_t iris_flush_bits_for_history(struct iris_resource *res);
 
 void iris_flush_and_dirty_for_history(struct iris_context *ice,
                                       struct iris_batch *batch,
-                                      struct iris_resource *res);
+                                      struct iris_resource *res,
+                                      const char *reason);
 
 unsigned iris_get_num_logical_layers(const struct iris_resource *res,
                                      unsigned level);