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intel/fs: Replace the CINTERP opcode with a simple MOV

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The only reason it was it's own opcode was so that we could detect it
and adjust the source register based on the payload setup.  Now that
we're using the ATTR file for FS inputs, there's no point in having a
magic opcode for this.

v2 (Jason Ekstrand):
 - Break the bit which removes the CINTERP opcode into its own patch

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Francisco Jerez
2018-05-18 15:20:43 -07:00
committed by Jason Ekstrand
parent 39de901a96
commit d3cd6b7215
5 changed files with 3 additions and 12 deletions
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1
src/intel/compiler/brw_eu_defines.h
View File

@@ -499,7 +499,6 @@ enum opcode {
*/
FS_OPCODE_DDY_COARSE,
FS_OPCODE_DDY_FINE,
FS_OPCODE_CINTERP,
FS_OPCODE_LINTERP,
FS_OPCODE_PIXEL_X,
FS_OPCODE_PIXEL_Y,

1
src/intel/compiler/brw_fs_cse.cpp
View File

@@ -75,7 +75,6 @@ is_expression(const fs_visitor *v, const fs_inst *const inst)
case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL:
case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
case FS_OPCODE_CINTERP:
case FS_OPCODE_LINTERP:
case SHADER_OPCODE_FIND_LIVE_CHANNEL:
case SHADER_OPCODE_BROADCAST:

3
src/intel/compiler/brw_fs_generator.cpp
View File

@@ -2112,9 +2112,6 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
BRW_MATH_PRECISION_FULL);
}
break;
case FS_OPCODE_CINTERP:
brw_MOV(p, dst, src[0]);
break;
case FS_OPCODE_LINTERP:
multiple_instructions_emitted = generate_linterp(inst, dst, src);
break;

2
src/intel/compiler/brw_fs_nir.cpp
View File

@@ -3392,7 +3392,7 @@ fs_visitor::nir_emit_fs_intrinsic(const fs_builder &bld,
}
for (unsigned int i = 0; i < num_components; i++) {
bld.emit(FS_OPCODE_CINTERP, offset(retype(dest, type), bld, i),
bld.MOV(offset(retype(dest, type), bld, i),
retype(component(interp_reg(base, comp + i), 3), type));
}

6
src/intel/compiler/brw_shader.cpp
View File

@@ -378,8 +378,6 @@ brw_instruction_name(const struct gen_device_info *devinfo, enum opcode op)
case FS_OPCODE_DDY_FINE:
return "ddy_fine";
case FS_OPCODE_CINTERP:
return "cinterp";
case FS_OPCODE_LINTERP:
return "linterp";
@@ -960,7 +958,6 @@ backend_instruction::can_do_cmod() const
case BRW_OPCODE_SHR:
case BRW_OPCODE_SUBB:
case BRW_OPCODE_XOR:
case FS_OPCODE_CINTERP:
case FS_OPCODE_LINTERP:
return true;
default:
@@ -987,8 +984,7 @@ backend_instruction::writes_accumulator_implicitly(const struct gen_device_info
return writes_accumulator ||
(devinfo->gen < 6 &&
((opcode >= BRW_OPCODE_ADD && opcode < BRW_OPCODE_NOP) ||
(opcode >= FS_OPCODE_DDX_COARSE && opcode <= FS_OPCODE_LINTERP &&
opcode != FS_OPCODE_CINTERP)));
(opcode >= FS_OPCODE_DDX_COARSE && opcode <= FS_OPCODE_LINTERP)));
}
bool