From d30c55abf10551807447d3d76fea5c7ea3e36619 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Mon, 30 Dec 2024 03:43:03 -0500 Subject: [PATCH] radeonsi: lower sysval intrinsics as late as possible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Timur Kristóf Part-of: --- src/gallium/drivers/radeonsi/si_shader.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 3d12f11064f..59271d4729a 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -2595,12 +2595,6 @@ static struct nir_shader *si_get_nir_shader(struct si_shader *shader, struct si_ NIR_PASS_V(nir, nir_clear_shared_memory, shared_size, chunk_size); } - NIR_PASS(progress, nir, si_nir_lower_abi, shader, args); - NIR_PASS(progress, nir, ac_nir_lower_intrinsics_to_args, sel->screen->info.gfx_level, - sel->screen->info.has_ls_vgpr_init_bug, - si_select_hw_stage(nir->info.stage, key, sel->screen->info.gfx_level), - shader->wave_size, si_get_max_workgroup_size(shader), &args->ac); - if (progress) { si_nir_opts(sel->screen, nir, false); progress = false; @@ -2641,6 +2635,12 @@ static struct nir_shader *si_get_nir_shader(struct si_shader *shader, struct si_ /* This must be after vectorization because it causes bindings_different_restrict() to fail. */ NIR_PASS(progress, nir, si_nir_lower_resource, shader, args); + NIR_PASS(progress, nir, si_nir_lower_abi, shader, args); + NIR_PASS(progress, nir, ac_nir_lower_intrinsics_to_args, sel->screen->info.gfx_level, + sel->screen->info.has_ls_vgpr_init_bug, + si_select_hw_stage(nir->info.stage, key, sel->screen->info.gfx_level), + shader->wave_size, si_get_max_workgroup_size(shader), &args->ac); + /* LLVM keep non-uniform sampler as index, so can't do this in NIR. * Must be done after si_nir_lower_resource(). */