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intel/debug: Add a common INTEL_DEBUG=nohiz option

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The GL driver had a driconf option (which doesn't make much sense) and
the Vulkan driver had a hand-rolled environment variable.  Instead,
let's tie both into the INTEL_DEBUG mechanism and unify things.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Jason Ekstrand
2017-03-13 14:23:34 -07:00
parent c09bb956ca
commit d142c7436c
5 changed files with 4 additions and 6 deletions
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1
src/intel/common/gen_debug.c
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@@ -82,6 +82,7 @@ static const struct debug_control debug_control[] = {
{ "l3", DEBUG_L3 }, { "l3", DEBUG_L3 },
{ "do32", DEBUG_DO32 }, { "do32", DEBUG_DO32 },
{ "norbc", DEBUG_NO_RBC }, { "norbc", DEBUG_NO_RBC },
{ "nohiz", DEBUG_NO_HIZ },
{ NULL, 0 } { NULL, 0 }
}; };

1
src/intel/common/gen_debug.h
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@@ -78,6 +78,7 @@ extern uint64_t INTEL_DEBUG;
#define DEBUG_L3 (1ull << 36) #define DEBUG_L3 (1ull << 36)
#define DEBUG_DO32 (1ull << 37) #define DEBUG_DO32 (1ull << 37)
#define DEBUG_NO_RBC (1ull << 38) #define DEBUG_NO_RBC (1ull << 38)
#define DEBUG_NO_HIZ (1ull << 39)
#ifdef HAVE_ANDROID_PLATFORM #ifdef HAVE_ANDROID_PLATFORM
#define LOG_TAG "INTEL-MESA" #define LOG_TAG "INTEL-MESA"

2
src/intel/vulkan/anv_image.c
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@@ -198,7 +198,7 @@ make_surface(const struct anv_device *dev,
anv_perf_warn("Implement multi-arrayLayer HiZ clears and resolves"); anv_perf_warn("Implement multi-arrayLayer HiZ clears and resolves");
} else if (dev->info.gen == 8 && vk_info->samples > 1) { } else if (dev->info.gen == 8 && vk_info->samples > 1) {
anv_perf_warn("Enable gen8 multisampled HiZ"); anv_perf_warn("Enable gen8 multisampled HiZ");
} else if (env_var_as_boolean("INTEL_VK_HIZ", true)) { } else if (!unlikely(INTEL_DEBUG & DEBUG_NO_HIZ)) {
assert(image->aux_surface.isl.size == 0); assert(image->aux_surface.isl.size == 0);
ok = isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl, ok = isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl,
&image->aux_surface.isl); &image->aux_surface.isl);

2
src/mesa/drivers/dri/i965/brw_context.c
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@@ -880,7 +880,7 @@ brw_process_driconf_options(struct brw_context *brw)
break; break;
} }
if (!driQueryOptionb(options, "hiz")) { if (INTEL_DEBUG & DEBUG_NO_HIZ) {
brw->has_hiz = false; brw->has_hiz = false;
/* On gen6, you can only do separate stencil with HIZ. */ /* On gen6, you can only do separate stencil with HIZ. */
if (brw->gen == 6) if (brw->gen == 6)

4
src/mesa/drivers/dri/i965/intel_screen.c
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@@ -56,10 +56,6 @@ DRI_CONF_BEGIN
DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects") DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
DRI_CONF_DESC_END DRI_CONF_DESC_END
DRI_CONF_OPT_END DRI_CONF_OPT_END
DRI_CONF_OPT_BEGIN_B(hiz, "true")
DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
DRI_CONF_OPT_END
DRI_CONF_SECTION_END DRI_CONF_SECTION_END
DRI_CONF_SECTION_QUALITY DRI_CONF_SECTION_QUALITY