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nir: allow specifying a set of opcodes in lower_alu_to_scalar

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This can be used by both etnaviv and freedreno/a2xx as they are both vec4
architectures with some instructions being scalar-only.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Jonathan Marek
2019-05-08 12:45:48 -04:00
parent f8bda81887
commit d0bff89159
12 changed files with 24 additions and 19 deletions
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4
src/intel/compiler/brw_nir.c
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@@ -561,7 +561,7 @@ brw_nir_optimize(nir_shader *nir, const struct brw_compiler *compiler,
OPT(nir_opt_combine_stores, nir_var_all);
if (is_scalar) {
OPT(nir_lower_alu_to_scalar);
OPT(nir_lower_alu_to_scalar, NULL);
}
OPT(nir_copy_prop);
@@ -701,7 +701,7 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir,
const bool is_scalar = compiler->scalar_stage[nir->info.stage];
if (is_scalar) {
OPT(nir_lower_alu_to_scalar);
OPT(nir_lower_alu_to_scalar, NULL);
}
if (nir->info.stage == MESA_SHADER_GEOMETRY)