v3d: Fix the name of the "flpop" operation.
Noticed while trying to sort a new op into the appropriate place to match the documentation.
This commit is contained in:
@@ -343,7 +343,7 @@ calculate_deps(struct schedule_state *state, struct schedule_node *n)
|
|||||||
add_read_dep(state, state->last_sf, n);
|
add_read_dep(state, state->last_sf, n);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case V3D_QPU_A_FLBPOP:
|
case V3D_QPU_A_FLPOP:
|
||||||
add_write_dep(state, &state->last_sf, n);
|
add_write_dep(state, &state->last_sf, n);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
@@ -905,7 +905,7 @@ VIR_A_ALU1(NOT)
|
|||||||
VIR_A_ALU1(NEG)
|
VIR_A_ALU1(NEG)
|
||||||
VIR_A_ALU1(FLAPUSH)
|
VIR_A_ALU1(FLAPUSH)
|
||||||
VIR_A_ALU1(FLBPUSH)
|
VIR_A_ALU1(FLBPUSH)
|
||||||
VIR_A_ALU1(FLBPOP)
|
VIR_A_ALU1(FLPOP)
|
||||||
VIR_A_ALU1(SETMSF)
|
VIR_A_ALU1(SETMSF)
|
||||||
VIR_A_ALU1(SETREVF)
|
VIR_A_ALU1(SETREVF)
|
||||||
VIR_A_ALU0(TIDX)
|
VIR_A_ALU0(TIDX)
|
||||||
|
@@ -106,7 +106,7 @@ v3d_qpu_add_op_name(enum v3d_qpu_add_op op)
|
|||||||
[V3D_QPU_A_NEG] = "neg",
|
[V3D_QPU_A_NEG] = "neg",
|
||||||
[V3D_QPU_A_FLAPUSH] = "flapush",
|
[V3D_QPU_A_FLAPUSH] = "flapush",
|
||||||
[V3D_QPU_A_FLBPUSH] = "flbpush",
|
[V3D_QPU_A_FLBPUSH] = "flbpush",
|
||||||
[V3D_QPU_A_FLBPOP] = "flbpop",
|
[V3D_QPU_A_FLPOP] = "flpop",
|
||||||
[V3D_QPU_A_SETMSF] = "setmsf",
|
[V3D_QPU_A_SETMSF] = "setmsf",
|
||||||
[V3D_QPU_A_SETREVF] = "setrevf",
|
[V3D_QPU_A_SETREVF] = "setrevf",
|
||||||
[V3D_QPU_A_NOP] = "nop",
|
[V3D_QPU_A_NOP] = "nop",
|
||||||
@@ -368,7 +368,7 @@ static const uint8_t add_op_args[] = {
|
|||||||
[V3D_QPU_A_NEG] = D | A,
|
[V3D_QPU_A_NEG] = D | A,
|
||||||
[V3D_QPU_A_FLAPUSH] = D | A,
|
[V3D_QPU_A_FLAPUSH] = D | A,
|
||||||
[V3D_QPU_A_FLBPUSH] = D | A,
|
[V3D_QPU_A_FLBPUSH] = D | A,
|
||||||
[V3D_QPU_A_FLBPOP] = D | A,
|
[V3D_QPU_A_FLPOP] = D | A,
|
||||||
[V3D_QPU_A_SETMSF] = D | A,
|
[V3D_QPU_A_SETMSF] = D | A,
|
||||||
[V3D_QPU_A_SETREVF] = D | A,
|
[V3D_QPU_A_SETREVF] = D | A,
|
||||||
[V3D_QPU_A_NOP] = 0,
|
[V3D_QPU_A_NOP] = 0,
|
||||||
|
@@ -165,7 +165,7 @@ enum v3d_qpu_add_op {
|
|||||||
V3D_QPU_A_NEG,
|
V3D_QPU_A_NEG,
|
||||||
V3D_QPU_A_FLAPUSH,
|
V3D_QPU_A_FLAPUSH,
|
||||||
V3D_QPU_A_FLBPUSH,
|
V3D_QPU_A_FLBPUSH,
|
||||||
V3D_QPU_A_FLBPOP,
|
V3D_QPU_A_FLPOP,
|
||||||
V3D_QPU_A_SETMSF,
|
V3D_QPU_A_SETMSF,
|
||||||
V3D_QPU_A_SETREVF,
|
V3D_QPU_A_SETREVF,
|
||||||
V3D_QPU_A_NOP,
|
V3D_QPU_A_NOP,
|
||||||
|
@@ -492,7 +492,7 @@ static const struct opcode_desc add_ops[] = {
|
|||||||
{ 186, 186, 1 << 1, ANYMUX, V3D_QPU_A_NEG },
|
{ 186, 186, 1 << 1, ANYMUX, V3D_QPU_A_NEG },
|
||||||
{ 186, 186, 1 << 2, ANYMUX, V3D_QPU_A_FLAPUSH },
|
{ 186, 186, 1 << 2, ANYMUX, V3D_QPU_A_FLAPUSH },
|
||||||
{ 186, 186, 1 << 3, ANYMUX, V3D_QPU_A_FLBPUSH },
|
{ 186, 186, 1 << 3, ANYMUX, V3D_QPU_A_FLBPUSH },
|
||||||
{ 186, 186, 1 << 4, ANYMUX, V3D_QPU_A_FLBPOP },
|
{ 186, 186, 1 << 4, ANYMUX, V3D_QPU_A_FLPOP },
|
||||||
{ 186, 186, 1 << 6, ANYMUX, V3D_QPU_A_SETMSF },
|
{ 186, 186, 1 << 6, ANYMUX, V3D_QPU_A_SETMSF },
|
||||||
{ 186, 186, 1 << 7, ANYMUX, V3D_QPU_A_SETREVF },
|
{ 186, 186, 1 << 7, ANYMUX, V3D_QPU_A_SETREVF },
|
||||||
{ 187, 187, 1 << 0, 1 << 0, V3D_QPU_A_NOP, 0 },
|
{ 187, 187, 1 << 0, 1 << 0, V3D_QPU_A_NOP, 0 },
|
||||||
|
@@ -40,6 +40,7 @@ static const struct {
|
|||||||
{ 33, 0x3c002380b6edb000ull, "or rf0, r3, r3 ; mov vpm, r3" },
|
{ 33, 0x3c002380b6edb000ull, "or rf0, r3, r3 ; mov vpm, r3" },
|
||||||
{ 33, 0x57403006bbb80000ull, "nop ; fmul r0, rf0, r5 ; ldvpm; ldunif" },
|
{ 33, 0x57403006bbb80000ull, "nop ; fmul r0, rf0, r5 ; ldvpm; ldunif" },
|
||||||
{ 33, 0x9c094adef634b000ull, "ffloor.ifb rf30.l, r3; fmul.pushz rf43.l, r5, r1.h" },
|
{ 33, 0x9c094adef634b000ull, "ffloor.ifb rf30.l, r3; fmul.pushz rf43.l, r5, r1.h" },
|
||||||
|
{ 33, 0xb0044c56ba326840ull, "flpop rf22, rf33 ; fmul.pushz rf49.l, r4.h, r1.abs" },
|
||||||
|
|
||||||
/* vfmul input packing */
|
/* vfmul input packing */
|
||||||
{ 33, 0x101e8b6e8aad4000ull, "fmax.nornn rf46, r4.l, r2.l; vfmul.ifnb rf45, r3, r5" },
|
{ 33, 0x101e8b6e8aad4000ull, "fmax.nornn rf46, r4.l, r2.l; vfmul.ifnb rf45, r3, r5" },
|
||||||
|
Reference in New Issue
Block a user