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i965: Add brw_program_deserialize_nir

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Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
This commit is contained in:
Jordan Justen
2017-11-03 16:40:17 -07:00
committed by Timothy Arceri
parent 7cf1037d5a
commit cdc7ac23b9
3 changed files with 28 additions and 23 deletions
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31
src/mesa/drivers/dri/i965/brw_disk_cache.c
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@@ -24,7 +24,6 @@
#include "compiler/blob.h" #include "compiler/blob.h"
#include "compiler/glsl/ir_uniform.h" #include "compiler/glsl/ir_uniform.h"
#include "compiler/glsl/shader_cache.h" #include "compiler/glsl/shader_cache.h"
#include "compiler/nir/nir_serialize.h"
#include "main/mtypes.h" #include "main/mtypes.h"
#include "util/build_id.h" #include "util/build_id.h"
#include "util/debug.h" #include "util/debug.h"
@@ -61,27 +60,6 @@ gen_shader_sha1(struct brw_context *brw, struct gl_program *prog,
_mesa_sha1_compute(manifest, strlen(manifest), out_sha1); _mesa_sha1_compute(manifest, strlen(manifest), out_sha1);
} }
static void
restore_serialized_nir_shader(struct brw_context *brw, struct gl_program *prog,
gl_shader_stage stage)
{
prog->program_written_to_cache = false;
if (brw->ctx._Shader->Flags & GLSL_CACHE_INFO) {
fprintf(stderr, "falling back to nir %s.\n",
_mesa_shader_stage_to_abbrev(prog->info.stage));
}
if (!prog->nir) {
assert(prog->driver_cache_blob && prog->driver_cache_blob_size > 0);
const struct nir_shader_compiler_options *options =
brw->ctx.Const.ShaderCompilerOptions[stage].NirOptions;
struct blob_reader reader;
blob_reader_init(&reader, prog->driver_cache_blob,
prog->driver_cache_blob_size);
prog->nir = nir_deserialize(NULL, options, &reader);
}
}
static void static void
write_blob_program_data(struct blob *binary, gl_shader_stage stage, write_blob_program_data(struct blob *binary, gl_shader_stage stage,
const void *program, const void *program,
@@ -298,7 +276,14 @@ brw_disk_cache_upload_program(struct brw_context *brw, gl_shader_stage stage)
return true; return true;
fail: fail:
restore_serialized_nir_shader(brw, prog, stage); prog->program_written_to_cache = false;
if (brw->ctx._Shader->Flags & GLSL_CACHE_INFO) {
fprintf(stderr, "falling back to nir %s.\n",
_mesa_shader_stage_to_abbrev(prog->info.stage));
}
brw_program_deserialize_nir(&brw->ctx, prog, stage);
return false; return false;
} }

16
src/mesa/drivers/dri/i965/brw_program.c
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@@ -40,6 +40,7 @@
#include "util/ralloc.h" #include "util/ralloc.h"
#include "compiler/glsl/ir.h" #include "compiler/glsl/ir.h"
#include "compiler/glsl/glsl_to_nir.h" #include "compiler/glsl/glsl_to_nir.h"
#include "compiler/nir/nir_serialize.h"
#include "brw_program.h" #include "brw_program.h"
#include "brw_context.h" #include "brw_context.h"
@@ -785,3 +786,18 @@ brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
assert(next_binding_table_offset <= BRW_MAX_SURFACES); assert(next_binding_table_offset <= BRW_MAX_SURFACES);
return next_binding_table_offset; return next_binding_table_offset;
} }
void
brw_program_deserialize_nir(struct gl_context *ctx, struct gl_program *prog,
gl_shader_stage stage)
{
if (!prog->nir) {
assert(prog->driver_cache_blob && prog->driver_cache_blob_size > 0);
const struct nir_shader_compiler_options *options =
ctx->Const.ShaderCompilerOptions[stage].NirOptions;
struct blob_reader reader;
blob_reader_init(&reader, prog->driver_cache_blob,
prog->driver_cache_blob_size);
prog->nir = nir_deserialize(NULL, options, &reader);
}
}

4
src/mesa/drivers/dri/i965/brw_program.h
View File

@@ -81,6 +81,10 @@ brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
struct brw_stage_prog_data *stage_prog_data, struct brw_stage_prog_data *stage_prog_data,
uint32_t next_binding_table_offset); uint32_t next_binding_table_offset);
void
brw_program_deserialize_nir(struct gl_context *ctx, struct gl_program *prog,
gl_shader_stage stage);
void void
brw_stage_prog_data_free(const void *prog_data); brw_stage_prog_data_free(const void *prog_data);