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intel/brw: Reduce scope of some MESH specific functions

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Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30169>
This commit is contained in:
Caio Oliveira
2024-07-12 23:31:56 -07:00
committed by Marge Bot
parent 67ead4edff
commit cdbee4156e
3 changed files with 21 additions and 21 deletions
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22
src/intel/compiler/brw_compile_mesh.cpp
View File

@@ -25,6 +25,7 @@
#include <vector> #include <vector>
#include "brw_compiler.h" #include "brw_compiler.h"
#include "brw_fs.h" #include "brw_fs.h"
#include "brw_fs_builder.h"
#include "brw_nir.h" #include "brw_nir.h"
#include "brw_private.h" #include "brw_private.h"
#include "compiler/nir/nir_builder.h" #include "compiler/nir/nir_builder.h"
@@ -259,6 +260,25 @@ brw_nir_align_launch_mesh_workgroups(nir_shader *nir)
NULL); NULL);
} }
static void
brw_emit_urb_fence(fs_visitor &s)
{
const fs_builder bld = fs_builder(&s).at_end();
brw_reg dst = bld.vgrf(BRW_TYPE_UD);
fs_inst *fence = bld.emit(SHADER_OPCODE_MEMORY_FENCE, dst,
brw_vec8_grf(0, 0),
brw_imm_ud(true),
brw_imm_ud(0));
fence->sfid = BRW_SFID_URB;
fence->desc = lsc_fence_msg_desc(s.devinfo, LSC_FENCE_LOCAL,
LSC_FLUSH_TYPE_NONE, true);
bld.exec_all().group(1, 0).emit(FS_OPCODE_SCHEDULING_FENCE,
bld.null_reg_ud(),
&dst,
1);
}
static bool static bool
run_task_mesh(fs_visitor &s, bool allow_spilling) run_task_mesh(fs_visitor &s, bool allow_spilling)
{ {
@@ -272,7 +292,7 @@ run_task_mesh(fs_visitor &s, bool allow_spilling)
if (s.failed) if (s.failed)
return false; return false;
s.emit_urb_fence(); brw_emit_urb_fence(s);
s.emit_cs_terminate(); s.emit_cs_terminate();

1
src/intel/compiler/brw_fs.h
View File

@@ -328,7 +328,6 @@ public:
brw_reg gs_urb_channel_mask(const brw_reg &dword_index); brw_reg gs_urb_channel_mask(const brw_reg &dword_index);
brw_reg gs_urb_per_slot_dword_index(const brw_reg &vertex_count); brw_reg gs_urb_per_slot_dword_index(const brw_reg &vertex_count);
bool mark_last_urb_write_with_eot(); bool mark_last_urb_write_with_eot();
void emit_urb_fence();
void emit_cs_terminate(); void emit_cs_terminate();
brw_reg interp_reg(const brw::fs_builder &bld, unsigned location, brw_reg interp_reg(const brw::fs_builder &bld, unsigned location,

19
src/intel/compiler/brw_fs_visitor.cpp
View File

@@ -405,25 +405,6 @@ fs_visitor::emit_urb_writes(const brw_reg &gs_vertex_count)
} }
} }
void
fs_visitor::emit_urb_fence()
{
const fs_builder bld = fs_builder(this).at_end();
brw_reg dst = bld.vgrf(BRW_TYPE_UD);
fs_inst *fence = bld.emit(SHADER_OPCODE_MEMORY_FENCE, dst,
brw_vec8_grf(0, 0),
brw_imm_ud(true),
brw_imm_ud(0));
fence->sfid = BRW_SFID_URB;
fence->desc = lsc_fence_msg_desc(devinfo, LSC_FENCE_LOCAL,
LSC_FLUSH_TYPE_NONE, true);
bld.exec_all().group(1, 0).emit(FS_OPCODE_SCHEDULING_FENCE,
bld.null_reg_ud(),
&dst,
1);
}
void void
fs_visitor::emit_cs_terminate() fs_visitor::emit_cs_terminate()
{ {