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tu/a7xx: Make A7XX_RB_UNKNOWN_8E06 value configurable per-gen

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It is some kind of DBG register which has different value
on different gens.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26934>
This commit is contained in:
Danylo Piliaiev
2024-01-08 14:56:28 +01:00
committed by Marge Bot
parent 98b62434bd
commit cdadead230
4 changed files with 11 additions and 4 deletions
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2
src/freedreno/common/freedreno_dev_info.h
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@@ -185,6 +185,8 @@ struct fd_dev_info {
uint32_t RB_UNKNOWN_8E01;
uint32_t VPC_DBG_ECO_CNTL;
uint32_t UCHE_UNKNOWN_0E12;
uint32_t RB_UNKNOWN_8E06;
} magic;
struct {

8
src/freedreno/common/freedreno_devices.py
View File

@@ -800,7 +800,9 @@ a730_magic_regs = dict(
RB_DBG_ECO_CNTL_blit = 0x00000000, # is it even needed?
RB_UNKNOWN_8E01 = 0x0,
VPC_DBG_ECO_CNTL = 0x02000000,
UCHE_UNKNOWN_0E12 = 0x3200000
UCHE_UNKNOWN_0E12 = 0x3200000,
RB_UNKNOWN_8E06 = 0x02080000,
)
a730_raw_magic_regs = [
@@ -893,7 +895,9 @@ add_gpus([
# HLSQ_DBG_ECO_CNTL = 0x0,
RB_UNKNOWN_8E01 = 0x0,
VPC_DBG_ECO_CNTL = 0x02000000,
UCHE_UNKNOWN_0E12 = 0x00000000
UCHE_UNKNOWN_0E12 = 0x00000000,
RB_UNKNOWN_8E06 = 0x02080000,
),
raw_magic_regs = [
[A6XXRegs.REG_A6XX_UCHE_CACHE_WAYS, 0x00040004],

3
src/freedreno/vulkan/tu_clear_blit.cc
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@@ -1451,7 +1451,8 @@ r3d_setup(struct tu_cmd_buffer *cmd,
if (CHIP >= A7XX) {
tu_cs_emit_regs(cs, A7XX_RB_UNKNOWN_8812(0x3ff));
tu_cs_emit_regs(cs, A7XX_RB_UNKNOWN_88E5(0x50120004));
tu_cs_emit_regs(cs, A7XX_RB_UNKNOWN_8E06(0x2080000));
tu_cs_emit_regs(cs,
A7XX_RB_UNKNOWN_8E06(cmd->device->physical_device->info->a6xx.magic.RB_UNKNOWN_8E06));
}
}

2
src/freedreno/vulkan/tu_cmd_buffer.cc
View File

@@ -1652,7 +1652,7 @@ tu6_sysmem_render_begin(struct tu_cmd_buffer *cmd, struct tu_cs *cs,
tu_cs_emit_regs(cs,
A7XX_RB_UNKNOWN_88E5(0x50120004));
tu_cs_emit_regs(cs,
A7XX_RB_UNKNOWN_8E06(0x2080000));
A7XX_RB_UNKNOWN_8E06(cmd->device->physical_device->info->a6xx.magic.RB_UNKNOWN_8E06));
/* These three have something to do with lrz/depth */
tu_cs_emit_regs(cs, A7XX_GRAS_UNKNOWN_8007(0x0));