radv: emit PA_SU_PRIM_FILTER_CNTL in the graphics preamble

This register doesn't change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19654>
This commit is contained in:
Samuel Pitoiset
2022-11-10 17:54:43 +01:00
committed by Marge Bot
parent d4ce63a87a
commit cd2e2021a0
2 changed files with 9 additions and 10 deletions

View File

@@ -4379,19 +4379,9 @@ static void
radv_pipeline_emit_multisample_state(struct radeon_cmdbuf *ctx_cs,
const struct radv_graphics_pipeline *pipeline)
{
const struct radv_physical_device *pdevice = pipeline->base.device->physical_device;
const struct radv_multisample_state *ms = &pipeline->ms;
radeon_set_context_reg(ctx_cs, R_028A4C_PA_SC_MODE_CNTL_1, ms->pa_sc_mode_cntl_1);
/* The exclusion bits can be set to improve rasterization efficiency
* if no sample lies on the pixel boundary (-8 sample offset). It's
* currently always TRUE because the driver doesn't support 16 samples.
*/
bool exclusion = pdevice->rad_info.gfx_level >= GFX7;
radeon_set_context_reg(
ctx_cs, R_02882C_PA_SU_PRIM_FILTER_CNTL,
S_02882C_XMAX_RIGHT_EXCLUSION(exclusion) | S_02882C_YMAX_BOTTOM_EXCLUSION(exclusion));
}
static void