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i965/fs: Enable store_ssbo for 8-bit types.

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v2: Update comment according to this patch. (Jason Ekstrand)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Jose Maria Casanova Crespo
2018-07-09 02:01:01 +02:00
parent 11c904d0d3
commit cd0afab99b
1 changed files with 8 additions and 7 deletions
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15
src/intel/compiler/brw_fs_nir.cpp
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@@ -4284,7 +4284,6 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
write_src = shuffle_for_32bit_write(bld, write_src, 0, write_src = shuffle_for_32bit_write(bld, write_src, 0,
num_components); num_components);
} else if (type_size < 4) { } else if (type_size < 4) {
assert(type_size == 2);
/* For 16-bit types we pack two consecutive values into a 32-bit /* For 16-bit types we pack two consecutive values into a 32-bit
* word and use an untyped write message. For single values or not * word and use an untyped write message. For single values or not
* 32-bit-aligned we need to use byte-scattered writes because * 32-bit-aligned we need to use byte-scattered writes because
@@ -4308,12 +4307,15 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
* being aligned to 32-bit. * being aligned to 32-bit.
*/ */
num_components = 1; num_components = 1;
} else if (num_components > 2 && (num_components % 2)) { } else if (num_components * type_size > 4 &&
/* If there is an odd number of consecutive components we left (num_components * type_size % 4)) {
* the not paired component for a following emit of length == 1 /* If the pending components size is not a multiple of 4 bytes
* with byte_scattered_write. * we left the not aligned components for following emits of
* length == 1 with byte_scattered_write.
*/ */
num_components --; num_components -= (num_components * type_size % 4) / type_size;
} else if (num_components * type_size < 4) {
num_components = 1;
} }
/* For num_components == 1 we are also shuffling the component /* For num_components == 1 we are also shuffling the component
* because byte scattered writes of 16-bit need values to be dword * because byte scattered writes of 16-bit need values to be dword
@@ -4337,7 +4339,6 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
} }
if (type_size < 4 && num_components == 1) { if (type_size < 4 && num_components == 1) {
assert(type_size == 2);
/* Untyped Surface messages have a fixed 32-bit size, so we need /* Untyped Surface messages have a fixed 32-bit size, so we need
* to rely on byte scattered in order to write 16-bit elements. * to rely on byte scattered in order to write 16-bit elements.
* The byte_scattered_write message needs that every written 16-bit * The byte_scattered_write message needs that every written 16-bit