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loader: default to iris for all future PCI IDs

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The existing "fallback" code didn't actually do anything, so this
removes it, and instead we just always fallback to `iris` for future
PCI IDs.

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Eric Engestrom
2019-10-05 22:30:51 +01:00
parent ea8116908c
commit cd04b63c00
6 changed files with 5 additions and 38 deletions
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18
include/pci_ids/i965_pci_ids.h
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@@ -1,11 +1,3 @@
/*
* IRIS not defined: include all devices supported by i965 or iris
* IRIS == 0: devices where i965 is supported
* IRIS == 1: devices where iris is supported, and will be tried before i965
* IRIS == 2: devices where iris is supported, and will be tried after i965
*/
#if !defined(IRIS) || IRIS == 0
/* Only try to load i965. Do not attempt iris. */
CHIPSET(0x29A2, i965, "Intel(R) 965G")
CHIPSET(0x2992, i965, "Intel(R) 965Q")
CHIPSET(0x2982, i965, "Intel(R) 965G")
@@ -103,9 +95,6 @@ CHIPSET(0x22B0, chv, "Intel(R) HD Graphics (Cherrytrail)")
CHIPSET(0x22B1, chv, "Intel(R) HD Graphics XXX (Braswell)") /* Overridden in brw_get_renderer_string */
CHIPSET(0x22B2, chv, "Intel(R) HD Graphics (Cherryview)")
CHIPSET(0x22B3, chv, "Intel(R) HD Graphics (Cherryview)")
#endif
#if !defined(IRIS) || IRIS == 0 || IRIS == 2
/* First try to load i965, then try iris */
CHIPSET(0x1602, bdw_gt1, "Intel(R) Broadwell GT1")
CHIPSET(0x1606, bdw_gt1, "Intel(R) Broadwell GT1")
CHIPSET(0x160A, bdw_gt1, "Intel(R) Broadwell GT1")
@@ -251,10 +240,3 @@ CHIPSET(0x4500, ehl_4x8, "Intel(R) HD Graphics (Elkhart Lake 4x8)")
CHIPSET(0x4571, ehl_4x8, "Intel(R) HD Graphics (Elkhart Lake 4x8)")
CHIPSET(0x4551, ehl_4x4, "Intel(R) HD Graphics (Elkhart Lake 4x4)")
CHIPSET(0x4541, ehl_2x4, "Intel(R) HD Graphics (Elkhart Lake 2x4)")
#endif
#if !defined(IRIS) || IRIS == 0 || IRIS == 1
/* First try to load iris, then try i965 */
#endif
#if !defined(IRIS) || IRIS == 1
/* Only try to load iris. Do not attempt i965. */
#endif

0
include/pci_ids/iris_pci_ids.h Normal file
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1
src/gallium/drivers/iris/iris_screen.c
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@@ -86,6 +86,7 @@ iris_get_name(struct pipe_screen *pscreen)
#undef CHIPSET
#define CHIPSET(id, symbol, str) case id: chipset = str; break;
#include "pci_ids/i965_pci_ids.h"
#include "pci_ids/iris_pci_ids.h"
default:
chipset = "Unknown Intel Chipset";
break;

2
src/intel/dev/gen_device_info.c
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@@ -1226,6 +1226,7 @@ gen_get_device_info_from_pci_id(int pci_id,
#define CHIPSET(id, family, name) \
case id: *devinfo = gen_device_info_##family; break;
#include "pci_ids/i965_pci_ids.h"
#include "pci_ids/iris_pci_ids.h"
default:
fprintf(stderr, "Driver does not support the 0x%x PCI ID.\n", pci_id);
return false;
@@ -1276,6 +1277,7 @@ gen_get_device_name(int devid)
#undef CHIPSET
#define CHIPSET(id, family, name) case id: return name;
#include "pci_ids/i965_pci_ids.h"
#include "pci_ids/iris_pci_ids.h"
default:
return NULL;
}

1
src/intel/dev/gen_device_info_test.c
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@@ -15,6 +15,7 @@ main(int argc, char *argv[])
#undef CHIPSET
#define CHIPSET(id, family, str_name) { .pci_id = id, .name = str_name, },
#include "pci_ids/i965_pci_ids.h"
#include "pci_ids/iris_pci_ids.h"
};
for (uint32_t i = 0; i < ARRAY_SIZE(chipsets); i++) {

21
src/loader/pci_id_driver_map.h
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@@ -16,25 +16,7 @@ static const int i915_chip_ids[] = {
static const int i965_chip_ids[] = {
#define CHIPSET(chip, family, name) chip,
#define IRIS 0 /* all i965 devices */
#include "pci_ids/i965_pci_ids.h"
#undef IRIS
#undef CHIPSET
};
static const int iris_chip_ids_1[] = {
#define CHIPSET(chip, family, name) chip,
#define IRIS 1 /* iris devices to try before i965 */
#include "pci_ids/i965_pci_ids.h"
#undef IRIS
#undef CHIPSET
};
static const int iris_chip_ids_2[] = {
#define CHIPSET(chip, family, name) chip,
#define IRIS 2 /* iris devices to try after i965 */
#include "pci_ids/i965_pci_ids.h"
#undef IRIS
#undef CHIPSET
};
@@ -84,9 +66,8 @@ static const struct {
bool (*predicate)(int fd);
} driver_map[] = {
{ 0x8086, "i915", i915_chip_ids, ARRAY_SIZE(i915_chip_ids) },
{ 0x8086, "iris", iris_chip_ids_1, ARRAY_SIZE(iris_chip_ids_1) },
{ 0x8086, "i965", i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
{ 0x8086, "iris", iris_chip_ids_2, ARRAY_SIZE(iris_chip_ids_2) },
{ 0x8086, "iris", NULL, -1 },
{ 0x1002, "radeon", r100_chip_ids, ARRAY_SIZE(r100_chip_ids) },
{ 0x1002, "r200", r200_chip_ids, ARRAY_SIZE(r200_chip_ids) },
{ 0x1002, "r300", r300_chip_ids, ARRAY_SIZE(r300_chip_ids) },