gm107/ir: add fp64 rsq
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: 19.0 <mesa-stable@lists.freedesktop.org>
This commit is contained in:
Karol Herbst
committed by
Ilia Mirkin
Ilia Mirkin
parent
815a8e59c6
commit
cce4955721
@@ -269,8 +269,84 @@ rcp_result_denorm:
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rcp_end:
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ret
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// RSQ F64
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//
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// INPUT: $r0d
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// OUTPUT: $r0d
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// CLOBBER: $r2 - $r9, $p0 - $p1
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//
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gm107_rsq_f64:
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sched (st 0x0) (st 0x0) (st 0x0)
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// Before getting initial result rsqrt64h, two special cases should be
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// handled first.
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// 1. NaN: set the highest bit in mantissa so it'll be surely recognized
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// as NaN in rsqrt64h
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sched (st 0xd wr 0x0 wt 0x3f) (st 0xd wt 0x1) (st 0xd)
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dsetp gtu and $p0 1 abs $r0 0x7ff0000000000000 1
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$p0 lop32i or $r1 $r1 0x00080000
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lop32i and $r2 $r1 0x7fffffff
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// 2. denorms and small normal values: using their original value will
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// lose precision either at rsqrt64h or the first step in newton-raphson
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// steps below. Take 2 as a threshold in exponent field, and multiply
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// with 2^54 if the exponent is smaller or equal. (will multiply 2^27
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// to recover in the end)
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sched (st 0xd) (st 0xd) (st 0xd)
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bfe u32 $r3 $r1 0xb14
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isetp le u32 and $p1 1 $r3 0x2 1
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lop or 1 $r2 $r0 $r2
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sched (st 0xd wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xd)
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$p1 dmul $r0 $r0 0x4350000000000000
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mufu rsq64h $r5 $r1
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// rsqrt64h will give correct result for 0/inf/nan, the following logic
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// checks whether the input is one of those (exponent is 0x7ff or all 0
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// except for the sign bit)
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iset ne u32 and $r6 $r3 0x7ff 1
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sched (st 0xd) (st 0xd) (st 0xd)
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lop and 1 $r2 $r2 $r6
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isetp ne u32 and $p0 1 $r2 0x0 1
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$p0 bra #rsq_norm
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// For 0/inf/nan, make sure the sign bit agrees with input and return
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sched (st 0xd) (st 0xd) (st 0xd wt 0x1)
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lop32i and $r1 $r1 0x80000000
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mov $r0 0x0 0xf
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lop or 1 $r1 $r1 $r5
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sched (st 0xd) (st 0xf) (st 0xf)
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ret
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nop 0
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nop 0
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rsq_norm:
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// For others, do 4 Newton-Raphson steps with the formula:
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// RSQ_{n + 1} = RSQ_{n} * (1.5 - 0.5 * x * RSQ_{n} * RSQ_{n})
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// In the code below, each step is written as:
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// tmp1 = 0.5 * x * RSQ_{n}
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// tmp2 = -RSQ_{n} * tmp1 + 0.5
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// RSQ_{n + 1} = RSQ_{n} * tmp2 + RSQ_{n}
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sched (st 0xd) (st 0xd wr 0x1) (st 0xd wr 0x1 rd 0x0 wt 0x3)
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mov $r4 0x0 0xf
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// 0x3f000000: 1/2
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f2f f32 f64 $r8 0x3f000000
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dmul $r2 $r0 $r8
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sched (st 0xd wr 0x0 wt 0x3) (st 0xd wr 0x0 wt 0x1) (st 0xd wr 0x0 wt 0x1)
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dmul $r0 $r2 $r4
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dfma $r6 $r0 neg $r4 $r8
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dfma $r4 $r4 $r6 $r4
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sched (st 0xd wr 0x0 wt 0x1) (st 0xd wr 0x0 wt 0x1) (st 0xd wr 0x0 wt 0x1)
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dmul $r0 $r2 $r4
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dfma $r6 $r0 neg $r4 $r8
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dfma $r4 $r4 $r6 $r4
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sched (st 0xd wr 0x0 wt 0x1) (st 0xd wr 0x0 wt 0x1) (st 0xd wr 0x0 wt 0x1)
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dmul $r0 $r2 $r4
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dfma $r6 $r0 neg $r4 $r8
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dfma $r4 $r4 $r6 $r4
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sched (st 0xd wr 0x0 wt 0x1) (st 0xd wr 0x0 wt 0x1) (st 0xd wr 0x0 wt 0x1)
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dmul $r0 $r2 $r4
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dfma $r6 $r0 neg $r4 $r8
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dfma $r4 $r4 $r6 $r4
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// Multiply 2^27 to result for small inputs to recover
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sched (st 0xd wr 0x0 wt 0x1) (st 0xd wt 0x1) (st 0xd)
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$p1 dmul $r4 $r4 0x41a0000000000000
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mov $r1 $r5 0xf
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mov $r0 $r4 0xf
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sched (st 0xd) (st 0xf) (st 0xf)
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ret
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nop 0
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nop 0
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@@ -182,7 +182,56 @@ uint64_t gm107_builtin_code[] = {
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/* 0x0558: rcp_end */
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0xe32000000007000f,
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/* 0x0560: gm107_rsq_f64 */
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0x001f8000fc0007e0,
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0x001fb401fda1ff0d,
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0x368c03fff0070087,
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0x0420008000000101,
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0x0407fffffff70102,
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0x001fb400fda007ed,
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0x38000000b1470103,
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0x366603800027030f,
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0x5c47020000270002,
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0x001fb401e1a0070d,
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0x3880004350010000,
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0x5080000000770105,
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0x365a03807ff70306,
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0x001fb400fda007ed,
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0x5c47000000670202,
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0x5b6a03800ff70207,
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0xe24000000400000f,
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0x003fb400fda007ed,
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0x0408000000070101,
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0x5c9807800ff70000,
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0x5c47020000570101,
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0x001fbc00fde007ed,
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0xe32000000007000f,
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0x50b0000000070f00,
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0x50b0000000070f00,
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/* 0x0620: rsq_norm */
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0x0060b400e5a007ed,
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0x5c9807800ff70004,
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0x38a8003f00070b08,
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0x5c80000000870002,
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0x003c3401e1a01f0d,
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0x5c80000000470200,
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0x5b71040000470006,
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0x5b70020000670404,
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0x003c3401e1a00f0d,
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0x5c80000000470200,
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0x5b71040000470006,
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0x5b70020000670404,
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0x003c3401e1a00f0d,
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0x5c80000000470200,
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0x5b71040000470006,
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0x5b70020000670404,
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0x003c3401e1a00f0d,
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0x5c80000000470200,
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0x5b71040000470006,
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0x5b70020000670404,
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0x001fb401fda00f0d,
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0x38800041a0010404,
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0x5c98078000570001,
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0x5c98078000470000,
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0x001fbc00fde007ed,
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0xe32000000007000f,
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0x50b0000000070f00,
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0x50b0000000070f00,
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@@ -129,7 +129,7 @@ NVC0LegalizeSSA::handleRCPRSQ(Instruction *i)
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bld.mkSplit(src, 4, i->getSrc(0));
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int chip = prog->getTarget()->getChipset();
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if (chip >= NVISA_GK104_CHIPSET && (i->op == OP_RCP || chip < NVISA_GM107_CHIPSET)) {
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if (chip >= NVISA_GK104_CHIPSET) {
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handleRCPRSQLib(i, src);
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return;
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}
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