nir: always emit ddx intrinsics

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31014>
2024-09-04 13:07:54 +02:00
parent 5205501e2f
commit cba575f4df
24 changed files with 14 additions and 42 deletions
--- a/src/amd/common/ac_shader_util.c
+++ b/src/amd/common/ac_shader_util.c
@@ -101,7 +101,6 @@ void ac_set_nir_options(struct radeon_info *info, bool use_llvm,
                         nir_io_prefer_scalar_fs_inputs |
                         nir_io_mix_convergent_flat_with_interpolated |
                         nir_io_vectorizer_ignores_types;
-   options->has_ddx_intrinsics = true;
   options->scalarize_ddx = true;
   options->skip_lower_packing_ops =
      BITFIELD_BIT(nir_lower_packing_op_unpack_64_2x32) |
--- a/src/asahi/compiler/agx_compile.h
+++ b/src/asahi/compiler/agx_compile.h
@@ -316,6 +316,5 @@ static const nir_shader_compiler_options agx_nir_options = {
   .lower_fquantize2f16 = true,
   .compact_arrays = true,
   .discard_is_demote = true,
-   .has_ddx_intrinsics = true,
   .scalarize_ddx = true,
 };
--- a/src/broadcom/vulkan/v3dv_pipeline.c
+++ b/src/broadcom/vulkan/v3dv_pipeline.c
@@ -230,7 +230,6 @@ v3dv_pipeline_get_nir_options(const struct v3d_device_info *devinfo)
      .divergence_analysis_options =
         nir_divergence_multiple_workgroup_per_compute_subgroup,
      .discard_is_demote = true,
-      .has_ddx_intrinsics = true,
      .scalarize_ddx = true,
   };

--- a/src/compiler/nir/nir_builder.h
+++ b/src/compiler/nir/nir_builder.h
@@ -1998,26 +1998,21 @@ nir_tex_src_for_ssa(nir_tex_src_type src_type, nir_def *def)
 #undef nir_ddy_coarse

 static inline nir_def *
-nir_build_deriv(nir_builder *b, nir_def *x, nir_op alu, nir_intrinsic_op intrin)
+nir_build_deriv(nir_builder *b, nir_def *x, nir_intrinsic_op intrin)
 {
-   /* Otherwise, build the derivative instruction: either intrinsic or ALU. */
-   if (b->shader->options->has_ddx_intrinsics) {
-      if (b->shader->options->scalarize_ddx && x->num_components > 1) {
-         nir_def *res[NIR_MAX_VEC_COMPONENTS] = { NULL };
+   if (b->shader->options->scalarize_ddx && x->num_components > 1) {
+      nir_def *res[NIR_MAX_VEC_COMPONENTS] = { NULL };

-         for (unsigned i = 0; i < x->num_components; ++i) {
-            res[i] = _nir_build_ddx(b, x->bit_size, nir_channel(b, x, i));
-            nir_instr_as_intrinsic(res[i]->parent_instr)->intrinsic = intrin;
-         }
-
-         return nir_vec(b, res, x->num_components);
-      } else {
-         nir_def *res = _nir_build_ddx(b, x->bit_size, x);
-         nir_instr_as_intrinsic(res->parent_instr)->intrinsic = intrin;
-         return res;
+      for (unsigned i = 0; i < x->num_components; ++i) {
+         res[i] = _nir_build_ddx(b, x->bit_size, nir_channel(b, x, i));
+         nir_instr_as_intrinsic(res[i]->parent_instr)->intrinsic = intrin;
      }
+
+      return nir_vec(b, res, x->num_components);
   } else {
-      return nir_build_alu1(b, alu, x);
+      nir_def *res = _nir_build_ddx(b, x->bit_size, x);
+      nir_instr_as_intrinsic(res->parent_instr)->intrinsic = intrin;
+      return res;
   }
 }

@@ -2025,7 +2020,7 @@ nir_build_deriv(nir_builder *b, nir_def *x, nir_op alu, nir_intrinsic_op intrin)
   static inline nir_def *                                                   \
      nir_##op(nir_builder *build, nir_def *src0)                            \
   {                                                                         \
-      return nir_build_deriv(build, src0, nir_op_f##op, nir_intrinsic_##op); \
+      return nir_build_deriv(build, src0, nir_intrinsic_##op);               \
   }

 DEF_DERIV(ddx)
--- a/src/freedreno/ir3/ir3_compiler.c
+++ b/src/freedreno/ir3/ir3_compiler.c
@@ -112,7 +112,6 @@ static const nir_shader_compiler_options ir3_base_options = {
   .lower_doubles_options = (nir_lower_doubles_options)~0,

   .divergence_analysis_options = nir_divergence_uniform_load_tears,
-   .has_ddx_intrinsics = true,
   .scalarize_ddx = true,
 };

--- a/src/gallium/auxiliary/nir/nir_to_tgsi.c
+++ b/src/gallium/auxiliary/nir/nir_to_tgsi.c
@@ -4087,7 +4087,6 @@ static const nir_shader_compiler_options nir_to_tgsi_compiler_options = {
    * workgroup id.
    */
   .lower_cs_local_index_to_id = true,
-   .has_ddx_intrinsics = true,
 };

 /* Returns a default compiler options for drivers with only nir-to-tgsi-based
--- a/src/gallium/drivers/etnaviv/etnaviv_compiler.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_compiler.c
@@ -78,7 +78,6 @@ etna_compiler_create(const char *renderer, const struct etna_core_info *info)
      .lower_ufind_msb = true,
      .has_uclz = true,
      .no_integers = info->halti < 2,
-      .has_ddx_intrinsics = true,
   };

   compiler->regs = etna_ra_setup(compiler);
--- a/src/gallium/drivers/i915/i915_screen.c
+++ b/src/gallium/drivers/i915/i915_screen.c
@@ -126,7 +126,6 @@ static const nir_shader_compiler_options i915_compiler_options = {
   .max_unroll_iterations = 32,
   .no_integers = true,
   .has_fused_comp_and_csel = true,
-   .has_ddx_intrinsics = true,
 };

 static const struct nir_shader_compiler_options gallivm_nir_options = {
--- a/src/gallium/drivers/lima/lima_program.c
+++ b/src/gallium/drivers/lima/lima_program.c
@@ -87,7 +87,6 @@ static const nir_shader_compiler_options fs_nir_options = {
   .force_indirect_unrolling_sampler = true,
   .lower_varying_from_uniform = true,
   .max_unroll_iterations = 32,
-   .has_ddx_intrinsics = true,
   .no_integers = true,
 };

--- a/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -673,7 +673,6 @@ static const struct nir_shader_compiler_options gallivm_nir_options = {
   .lower_fisnormal = true,
   .lower_fquantize2f16 = true,
   .driver_functions = true,
-   .has_ddx_intrinsics = true,
   .scalarize_ddx = true,
 };

--- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
@@ -482,7 +482,6 @@ static const nir_shader_compiler_options nv30_base_compiler_options = {
   .no_integers = true,

   .use_interpolated_input_intrinsics = true,
-   .has_ddx_intrinsics = true,
 };

 static const void *
--- a/src/gallium/drivers/r300/r300_screen.c
+++ b/src/gallium/drivers/r300/r300_screen.c
@@ -488,8 +488,7 @@ static int r300_get_video_param(struct pipe_screen *screen,
   .lower_uniforms_to_ubo = true,             \
   .lower_vector_cmp = true,                  \
   .no_integers = true,                       \
-   .use_interpolated_input_intrinsics = true, \
-   .has_ddx_intrinsics = true
+   .use_interpolated_input_intrinsics = true

 static const nir_shader_compiler_options r500_vs_compiler_options = {
   COMMON_NIR_OPTIONS,
--- a/src/gallium/drivers/r600/r600_pipe_common.c
+++ b/src/gallium/drivers/r600/r600_pipe_common.c
@@ -1404,7 +1404,6 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
 		.lower_uniforms_to_ubo = true,
 		.lower_image_offset_to_range_base = 1,
 		.vectorize_tess_levels = 1,
-		.has_ddx_intrinsics = true,
 	};

 	rscreen->nir_options = nir_options;
--- a/src/gallium/drivers/softpipe/sp_screen.c
+++ b/src/gallium/drivers/softpipe/sp_screen.c
@@ -95,7 +95,6 @@ static const nir_shader_compiler_options sp_compiler_options = {
    * workgroup id.
    */
   .lower_cs_local_index_to_id = true,
-   .has_ddx_intrinsics = true,
 };

 static const void *
--- a/src/gallium/drivers/svga/svga_screen.c
+++ b/src/gallium/drivers/svga/svga_screen.c
@@ -717,8 +717,7 @@ vgpu10_get_shader_param(struct pipe_screen *screen,
   .lower_vector_cmp = true,                                                  \
   .lower_cs_local_index_to_id = true,                                        \
   .max_unroll_iterations = 32,                                               \
-   .use_interpolated_input_intrinsics = true,                                 \
-   .has_ddx_intrinsics = true
+   .use_interpolated_input_intrinsics = true

 #define VGPU10_OPTIONS                                                        \
   .lower_doubles_options = nir_lower_dfloor | nir_lower_dsign | nir_lower_dceil | nir_lower_dtrunc | nir_lower_dround_even, \
--- a/src/gallium/drivers/v3d/v3d_screen.c
+++ b/src/gallium/drivers/v3d/v3d_screen.c
@@ -763,7 +763,6 @@ v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
                 */
                .max_unroll_iterations = 16,
                .force_indirect_unrolling_sampler = true,
-                .has_ddx_intrinsics = true,
                .scalarize_ddx = true,
        };

--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -2184,7 +2184,6 @@ static const nir_shader_compiler_options nir_options = {
        .lower_mul_high = true,
        .max_unroll_iterations = 32,
        .force_indirect_unrolling = (nir_var_shader_in | nir_var_shader_out | nir_var_function_temp),
-        .has_ddx_intrinsics = true,
        .scalarize_ddx = true,
 };

--- a/src/gallium/drivers/zink/zink_compiler.c
+++ b/src/gallium/drivers/zink/zink_compiler.c
@@ -1384,7 +1384,6 @@ zink_screen_init_compiler(struct zink_screen *screen)
      .support_indirect_outputs = BITFIELD_MASK(MESA_SHADER_COMPUTE),
      .max_unroll_iterations = 0,
      .use_interpolated_input_intrinsics = true,
-      .has_ddx_intrinsics = true,
   };

   screen->nir_options = default_options;
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_compiler.c
@@ -79,7 +79,6 @@ const struct nir_shader_compiler_options brw_scalar_nir_options = {
   .vectorize_io = true,
   .vectorize_tess_levels = true,
   .vertex_id_zero_based = true,
-   .has_ddx_intrinsics = true,
   .scalarize_ddx = true,
 };

--- a/src/intel/compiler/elk/elk_nir_options.c
+++ b/src/intel/compiler/elk/elk_nir_options.c
@@ -26,7 +26,6 @@
   .vectorize_io = true,                                                      \
   .vectorize_tess_levels = true,                                             \
   .use_interpolated_input_intrinsics = true,                                 \
-   .has_ddx_intrinsics = true,                                                \
   .scalarize_ddx = true,                                                     \
   .lower_insert_byte = true,                                                 \
   .lower_insert_word = true,                                                 \
--- a/src/microsoft/compiler/nir_to_dxil.c
+++ b/src/microsoft/compiler/nir_to_dxil.c
@@ -161,7 +161,6 @@ nir_options = {
   .support_16bit_alu = true,
   .preserve_mediump = true,
   .discard_is_demote = true,
-   .has_ddx_intrinsics = true,
   .scalarize_ddx = true,
 };

--- a/src/nouveau/compiler/nak/api.rs
+++ b/src/nouveau/compiler/nak/api.rs
@@ -163,7 +163,6 @@ fn nir_options(dev: &nv_device_info) -> nir_shader_compiler_options {
    op.discard_is_demote = true;

    op.max_unroll_iterations = 32;
-    op.has_ddx_intrinsics = true;
    op.scalarize_ddx = true;

    op
--- a/src/panfrost/compiler/bifrost_compile.h
+++ b/src/panfrost/compiler/bifrost_compile.h
@@ -100,7 +100,6 @@ void bifrost_compile_shader_nir(nir_shader *nir,
      .force_indirect_unrolling =                                              \
         (nir_var_shader_in | nir_var_shader_out | nir_var_function_temp),     \
      .force_indirect_unrolling_sampler = true,                                \
-      .has_ddx_intrinsics = true,                                              \
      .scalarize_ddx = true,                                                   \
   };

--- a/src/panfrost/midgard/midgard_compile.h
+++ b/src/panfrost/midgard/midgard_compile.h
@@ -106,7 +106,6 @@ static const nir_shader_compiler_options midgard_nir_options = {
   .force_indirect_unrolling =
      (nir_var_shader_in | nir_var_shader_out | nir_var_function_temp),
   .force_indirect_unrolling_sampler = true,
-   .has_ddx_intrinsics = true,
 };

 #endif