i965: Add functions to abstract access to register types

Previously the brw_inst{,_set}_{dst,src0,src1}_reg_type() functions
provided access to the hardware encodings for the register types. We
often mixed these with the logical BRW_REGISTER_TYPE_* enums (which
themselves used to be the hardware format!) with bad results.

With that functionality now available with the hw_ versions (see
previous commit), we now add functions that take the logical
BRW_REGISTER_TYPE_* enums and convert into the hardware format and vice
versa. To do the conversion we also have to provide the file.

Note the asymmetry between the two functions: the new getter reads the
file from the instruction word, and to ensure that is always set the
setter writes both the file and the type.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
This commit is contained in:
Matt Turner
2017-07-26 16:51:58 -07:00
parent 9fb8323328
commit cb2cd462b1
2 changed files with 79 additions and 51 deletions

View File

@@ -35,6 +35,7 @@
#include <stdint.h>
#include "brw_eu_defines.h"
#include "brw_reg_type.h"
#include "common/gen_device_info.h"
#ifdef __cplusplus
@@ -652,6 +653,33 @@ brw_inst_set_imm_uq(const struct gen_device_info *devinfo,
/** @} */
#define REG_TYPE(reg) \
static inline void \
brw_inst_set_##reg##_file_type(const struct gen_device_info *devinfo, \
brw_inst *inst, enum brw_reg_file file, \
enum brw_reg_type type) \
{ \
assert(file <= BRW_IMMEDIATE_VALUE); \
unsigned hw_type = brw_reg_type_to_hw_type(devinfo, file, type); \
brw_inst_set_##reg##_reg_file(devinfo, inst, file); \
brw_inst_set_##reg##_reg_hw_type(devinfo, inst, hw_type); \
} \
\
static inline enum brw_reg_type \
brw_inst_##reg##_type(const struct gen_device_info *devinfo, \
const brw_inst *inst) \
{ \
unsigned file = brw_inst_##reg##_reg_file(devinfo, inst); \
unsigned hw_type = brw_inst_##reg##_reg_hw_type(devinfo, inst); \
return brw_hw_type_to_reg_type(devinfo, (enum brw_reg_file)file, hw_type); \
}
REG_TYPE(dst)
REG_TYPE(src0)
REG_TYPE(src1)
#undef REG_TYPE
/* The AddrImm fields are split into two discontiguous sections on Gen8+ */
#define BRW_IA1_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low) \
static inline void \