radeonsi: split per-patch from per-vertex indices
Make it a bit clearer that the index spaces are logically seperate by having them defined in different functions. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
@@ -104,6 +104,28 @@ static bool is_merged_shader(struct si_shader *shader)
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shader->selector->type == PIPE_SHADER_GEOMETRY;
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}
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/**
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* Returns a unique index for a per-patch semantic name and index. The index
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* must be less than 32, so that a 32-bit bitmask of used inputs or outputs
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* can be calculated.
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*/
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unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name, unsigned index)
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{
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switch (semantic_name) {
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case TGSI_SEMANTIC_TESSOUTER:
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return 0;
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case TGSI_SEMANTIC_TESSINNER:
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return 1;
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case TGSI_SEMANTIC_PATCH:
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assert(index < 30);
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return 2 + index;
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default:
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assert(!"invalid semantic name");
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return 0;
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}
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}
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/**
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* Returns a unique index for a semantic name and index. The index must be
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* less than 64, so that a 64-bit bitmask of used inputs or outputs can be
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@@ -126,14 +148,6 @@ unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index)
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assert(!"invalid generic index");
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return 0;
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/* patch indices are completely separate and thus start from 0 */
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case TGSI_SEMANTIC_TESSOUTER:
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return 0;
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case TGSI_SEMANTIC_TESSINNER:
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return 1;
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case TGSI_SEMANTIC_PATCH:
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return 2 + index;
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default:
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assert(!"invalid semantic name");
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return 0;
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@@ -670,10 +684,15 @@ static LLVMValueRef get_dw_address(struct si_shader_context *ctx,
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LLVMBuildMul(gallivm->builder, ind_index,
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LLVMConstInt(ctx->i32, 4, 0), ""), "");
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param = si_shader_io_get_unique_index(name[first], index[first]);
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param = reg.Register.Dimension ?
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si_shader_io_get_unique_index(name[first], index[first]) :
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si_shader_io_get_unique_index_patch(name[first], index[first]);
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} else {
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param = si_shader_io_get_unique_index(name[reg.Register.Index],
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index[reg.Register.Index]);
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param = reg.Register.Dimension ?
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si_shader_io_get_unique_index(name[reg.Register.Index],
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index[reg.Register.Index]) :
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si_shader_io_get_unique_index_patch(name[reg.Register.Index],
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index[reg.Register.Index]);
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}
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/* Add the base address of the element. */
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@@ -795,8 +814,9 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
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param_index = ctx->i32_0;
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}
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param_index_base = si_shader_io_get_unique_index(name[param_base],
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index[param_base]);
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param_index_base = reg.Register.Dimension ?
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si_shader_io_get_unique_index(name[param_base], index[param_base]) :
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si_shader_io_get_unique_index_patch(name[param_base], index[param_base]);
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param_index = LLVMBuildAdd(gallivm->builder, param_index,
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LLVMConstInt(ctx->i32, param_index_base, 0),
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@@ -1548,7 +1568,7 @@ static void declare_system_value(struct si_shader_context *ctx,
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case TGSI_SEMANTIC_TESSOUTER:
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{
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LLVMValueRef buffer, base, addr;
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int param = si_shader_io_get_unique_index(decl->Semantic.Name, 0);
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int param = si_shader_io_get_unique_index_patch(decl->Semantic.Name, 0);
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buffer = desc_from_addr_base64k(ctx, ctx->param_tcs_offchip_addr_base64k);
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@@ -2555,8 +2575,8 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
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/* Load tess_inner and tess_outer from LDS.
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* Any invocation can write them, so we can't get them from a temporary.
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*/
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tess_inner_index = si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSINNER, 0);
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tess_outer_index = si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSOUTER, 0);
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tess_inner_index = si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER, 0);
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tess_outer_index = si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER, 0);
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lds_base = tcs_out_current_patch_data_offset;
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lds_inner = LLVMBuildAdd(gallivm->builder, lds_base,
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@@ -2639,7 +2659,7 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
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buf = desc_from_addr_base64k(ctx, ctx->param_tcs_offchip_addr_base64k);
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base = LLVMGetParam(ctx->main_fn, ctx->param_tcs_offchip_offset);
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param_outer = si_shader_io_get_unique_index(
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param_outer = si_shader_io_get_unique_index_patch(
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TGSI_SEMANTIC_TESSOUTER, 0);
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tf_outer_offset = get_tcs_tes_buffer_address(ctx, rel_patch_id, NULL,
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LLVMConstInt(ctx->i32, param_outer, 0));
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@@ -2651,7 +2671,7 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
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outer_comps, tf_outer_offset,
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base, 0, 1, 0, true, false);
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if (inner_comps) {
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param_inner = si_shader_io_get_unique_index(
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param_inner = si_shader_io_get_unique_index_patch(
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TGSI_SEMANTIC_TESSINNER, 0);
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tf_inner_offset = get_tcs_tes_buffer_address(ctx, rel_patch_id, NULL,
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LLVMConstInt(ctx->i32, param_inner, 0));
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@@ -597,6 +597,7 @@ int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
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struct si_shader *shader,
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struct pipe_debug_callback *debug);
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void si_shader_destroy(struct si_shader *shader);
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unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name, unsigned index);
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unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
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unsigned si_shader_io_get_unique_index2(unsigned name, unsigned index);
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int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader);
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@@ -1981,8 +1981,8 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
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case PIPE_SHADER_TESS_CTRL:
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/* Always reserve space for these. */
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sel->patch_outputs_written |=
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(1llu << si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSINNER, 0)) |
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(1llu << si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSOUTER, 0));
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(1llu << si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER, 0)) |
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(1llu << si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER, 0));
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/* fall through */
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case PIPE_SHADER_VERTEX:
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case PIPE_SHADER_TESS_EVAL:
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@@ -1995,7 +1995,7 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
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case TGSI_SEMANTIC_TESSOUTER:
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case TGSI_SEMANTIC_PATCH:
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sel->patch_outputs_written |=
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1llu << si_shader_io_get_unique_index(name, index);
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1llu << si_shader_io_get_unique_index_patch(name, index);
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break;
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case TGSI_SEMANTIC_GENERIC:
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