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freedreno/regs: define the wide bus enable bit in DSI_VID_CFG0

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Follow the kernel patch by Jonathan Marek and define the DATABUS_WIDEN
bit in the DSI_VID_CFG0 register.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27271>
This commit is contained in:
Dmitry Baryshkov
2024-01-25 15:53:54 +02:00
committed by Marge Bot
parent 7a81855a67
commit cb1b6649e1
1 changed files with 1 additions and 0 deletions
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src/freedreno/registers/dsi/dsi.xml
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@@ -149,6 +149,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
<bitfield name="HSA_POWER_STOP" pos="16" type="boolean"/>
<bitfield name="HBP_POWER_STOP" pos="20" type="boolean"/>
<bitfield name="HFP_POWER_STOP" pos="24" type="boolean"/>
<bitfield name="DATABUS_WIDEN" pos="25" type="boolean"/>
<bitfield name="PULSE_MODE_HSA_HE" pos="28" type="boolean"/>
</reg32>
<reg32 offset="0x0001c" name="VID_CFG1">