From cb1b6649e12abd8f082cc46f83e6eb695932b8b3 Mon Sep 17 00:00:00 2001
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Date: Thu, 25 Jan 2024 15:53:54 +0200
Subject: [PATCH] freedreno/regs: define the wide bus enable bit in
 DSI_VID_CFG0

Follow the kernel patch by Jonathan Marek and define the DATABUS_WIDEN
bit in the DSI_VID_CFG0 register.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27271>
---
 src/freedreno/registers/dsi/dsi.xml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/freedreno/registers/dsi/dsi.xml b/src/freedreno/registers/dsi/dsi.xml
index ca9bfad7d63..9fdca3b7567 100644
--- a/src/freedreno/registers/dsi/dsi.xml
+++ b/src/freedreno/registers/dsi/dsi.xml
@@ -149,6 +149,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 		<bitfield name="HSA_POWER_STOP" pos="16" type="boolean"/>
 		<bitfield name="HBP_POWER_STOP" pos="20" type="boolean"/>
 		<bitfield name="HFP_POWER_STOP" pos="24" type="boolean"/>
+		<bitfield name="DATABUS_WIDEN" pos="25" type="boolean"/>
 		<bitfield name="PULSE_MODE_HSA_HE" pos="28" type="boolean"/>
 	</reg32>
 	<reg32 offset="0x0001c" name="VID_CFG1">