i965/vec4: Add vector float immediate infrastructure.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Matt Turner
2014-03-08 17:22:22 -08:00
parent 5d23721c1d
commit cb0ba848d4
3 changed files with 23 additions and 0 deletions

View File

@@ -112,6 +112,18 @@ src_reg::src_reg(int32_t i)
this->fixed_hw_reg.dw1.d = i;
}
src_reg::src_reg(uint8_t vf0, uint8_t vf1, uint8_t vf2, uint8_t vf3)
{
init();
this->file = IMM;
this->type = BRW_REGISTER_TYPE_VF;
this->fixed_hw_reg.dw1.ud = (vf0 << 0) |
(vf1 << 8) |
(vf2 << 16) |
(vf3 << 24);
}
src_reg::src_reg(struct brw_reg reg)
{
init();
@@ -1396,6 +1408,13 @@ vec4_visitor::dump_instruction(backend_instruction *be_inst, FILE *file)
case BRW_REGISTER_TYPE_UD:
fprintf(file, "%uU", inst->src[i].fixed_hw_reg.dw1.ud);
break;
case BRW_REGISTER_TYPE_VF:
fprintf(stderr, "[%-gF, %-gF, %-gF, %-gF]",
brw_vf_to_float((inst->src[i].fixed_hw_reg.dw1.ud >> 0) & 0xff),
brw_vf_to_float((inst->src[i].fixed_hw_reg.dw1.ud >> 8) & 0xff),
brw_vf_to_float((inst->src[i].fixed_hw_reg.dw1.ud >> 16) & 0xff),
brw_vf_to_float((inst->src[i].fixed_hw_reg.dw1.ud >> 24) & 0xff));
break;
default:
fprintf(file, "???");
break;

View File

@@ -102,6 +102,7 @@ public:
src_reg(float f);
src_reg(uint32_t u);
src_reg(int32_t i);
src_reg(uint8_t vf0, uint8_t vf1, uint8_t vf2, uint8_t vf3);
src_reg(struct brw_reg reg);
bool equals(const src_reg &r) const;

View File

@@ -92,6 +92,9 @@ vec4_instruction::get_src(const struct brw_vec4_prog_data *prog_data, int i)
case BRW_REGISTER_TYPE_UD:
brw_reg = brw_imm_ud(src[i].fixed_hw_reg.dw1.ud);
break;
case BRW_REGISTER_TYPE_VF:
brw_reg = brw_imm_vf(src[i].fixed_hw_reg.dw1.ud);
break;
default:
unreachable("not reached");
}