nir: Take a shader and variable mode in nir_assign_io_var_locations
Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
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caab46c1e9
@@ -648,7 +648,7 @@ void
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radv_lower_fs_io(nir_shader *nir)
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radv_lower_fs_io(nir_shader *nir)
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{
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{
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NIR_PASS_V(nir, lower_view_index);
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NIR_PASS_V(nir, lower_view_index);
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nir_assign_io_var_locations(&nir->inputs, &nir->num_inputs,
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nir_assign_io_var_locations(nir, nir_var_shader_in, &nir->num_inputs,
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MESA_SHADER_FRAGMENT);
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MESA_SHADER_FRAGMENT);
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NIR_PASS_V(nir, nir_lower_io, nir_var_shader_in, type_size_vec4, 0);
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NIR_PASS_V(nir, nir_lower_io, nir_var_shader_in, type_size_vec4, 0);
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@@ -3999,7 +3999,8 @@ bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
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bool nir_lower_amul(nir_shader *shader,
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bool nir_lower_amul(nir_shader *shader,
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int (*type_size)(const struct glsl_type *, bool));
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int (*type_size)(const struct glsl_type *, bool));
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void nir_assign_io_var_locations(struct exec_list *var_list,
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void nir_assign_io_var_locations(nir_shader *shader,
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nir_variable_mode mode,
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unsigned *size,
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unsigned *size,
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gl_shader_stage stage);
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gl_shader_stage stage);
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@@ -1075,30 +1075,30 @@ insert_sorted(struct exec_list *var_list, nir_variable *new_var)
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}
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}
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static void
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static void
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sort_varyings(struct exec_list *var_list)
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sort_varyings(nir_shader *shader, nir_variable_mode mode,
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struct exec_list *sorted_list)
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{
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{
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struct exec_list new_list;
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exec_list_make_empty(sorted_list);
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exec_list_make_empty(&new_list);
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nir_foreach_variable_with_modes_safe(var, shader, mode) {
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nir_foreach_variable_safe(var, var_list) {
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exec_node_remove(&var->node);
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exec_node_remove(&var->node);
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insert_sorted(&new_list, var);
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insert_sorted(sorted_list, var);
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}
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}
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exec_list_move_nodes_to(&new_list, var_list);
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}
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}
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void
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void
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nir_assign_io_var_locations(struct exec_list *var_list, unsigned *size,
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nir_assign_io_var_locations(nir_shader *shader, nir_variable_mode mode,
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gl_shader_stage stage)
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unsigned *size, gl_shader_stage stage)
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{
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{
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unsigned location = 0;
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unsigned location = 0;
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unsigned assigned_locations[VARYING_SLOT_TESS_MAX];
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unsigned assigned_locations[VARYING_SLOT_TESS_MAX];
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uint64_t processed_locs[2] = {0};
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uint64_t processed_locs[2] = {0};
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sort_varyings(var_list);
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struct exec_list io_vars;
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sort_varyings(shader, mode, &io_vars);
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int UNUSED last_loc = 0;
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int UNUSED last_loc = 0;
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bool last_partial = false;
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bool last_partial = false;
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nir_foreach_variable(var, var_list) {
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nir_foreach_variable(var, &io_vars) {
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const struct glsl_type *type = var->type;
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const struct glsl_type *type = var->type;
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if (nir_is_per_vertex_io(var, stage) || var->data.per_view) {
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if (nir_is_per_vertex_io(var, stage) || var->data.per_view) {
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assert(glsl_type_is_array(type));
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assert(glsl_type_is_array(type));
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@@ -1201,6 +1201,8 @@ nir_assign_io_var_locations(struct exec_list *var_list, unsigned *size,
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if (last_partial)
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if (last_partial)
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location++;
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location++;
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struct exec_list *var_list = nir_variable_list_for_mode(shader, mode);
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exec_list_append(var_list, &io_vars);
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*size = location;
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*size = location;
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}
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}
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@@ -764,8 +764,8 @@ tu_shader_create(struct tu_device *dev,
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NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false);
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NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false);
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nir_assign_io_var_locations(&nir->inputs, &nir->num_inputs, stage);
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nir_assign_io_var_locations(nir, nir_var_shader_in, &nir->num_inputs, stage);
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nir_assign_io_var_locations(&nir->outputs, &nir->num_outputs, stage);
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nir_assign_io_var_locations(nir, nir_var_shader_out, &nir->num_outputs, stage);
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NIR_PASS_V(nir, nir_lower_system_values);
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NIR_PASS_V(nir, nir_lower_system_values);
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NIR_PASS_V(nir, nir_lower_frexp);
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NIR_PASS_V(nir, nir_lower_frexp);
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@@ -853,28 +853,28 @@ void
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st_nir_assign_varying_locations(struct st_context *st, nir_shader *nir)
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st_nir_assign_varying_locations(struct st_context *st, nir_shader *nir)
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{
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{
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if (nir->info.stage == MESA_SHADER_VERTEX) {
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if (nir->info.stage == MESA_SHADER_VERTEX) {
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nir_assign_io_var_locations(&nir->outputs,
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nir_assign_io_var_locations(nir, nir_var_shader_out,
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&nir->num_outputs,
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&nir->num_outputs,
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nir->info.stage);
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nir->info.stage);
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st_nir_fixup_varying_slots(st, &nir->outputs);
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st_nir_fixup_varying_slots(st, &nir->outputs);
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} else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
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} else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
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nir->info.stage == MESA_SHADER_TESS_CTRL ||
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nir->info.stage == MESA_SHADER_TESS_CTRL ||
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nir->info.stage == MESA_SHADER_TESS_EVAL) {
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nir->info.stage == MESA_SHADER_TESS_EVAL) {
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nir_assign_io_var_locations(&nir->inputs,
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nir_assign_io_var_locations(nir, nir_var_shader_in,
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&nir->num_inputs,
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&nir->num_inputs,
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nir->info.stage);
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nir->info.stage);
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st_nir_fixup_varying_slots(st, &nir->inputs);
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st_nir_fixup_varying_slots(st, &nir->inputs);
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nir_assign_io_var_locations(&nir->outputs,
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nir_assign_io_var_locations(nir, nir_var_shader_out,
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&nir->num_outputs,
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&nir->num_outputs,
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nir->info.stage);
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nir->info.stage);
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st_nir_fixup_varying_slots(st, &nir->outputs);
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st_nir_fixup_varying_slots(st, &nir->outputs);
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} else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
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} else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
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nir_assign_io_var_locations(&nir->inputs,
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nir_assign_io_var_locations(nir, nir_var_shader_in,
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&nir->num_inputs,
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&nir->num_inputs,
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nir->info.stage);
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nir->info.stage);
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st_nir_fixup_varying_slots(st, &nir->inputs);
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st_nir_fixup_varying_slots(st, &nir->inputs);
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nir_assign_io_var_locations(&nir->outputs,
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nir_assign_io_var_locations(nir, nir_var_shader_out,
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&nir->num_outputs,
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&nir->num_outputs,
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nir->info.stage);
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nir->info.stage);
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} else if (nir->info.stage == MESA_SHADER_COMPUTE) {
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} else if (nir->info.stage == MESA_SHADER_COMPUTE) {
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