ac: move ac_get_max_wave64_per_simd into radeon_info

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This commit is contained in:
Marek Olšák
2019-09-12 19:39:02 -04:00
parent deab3a23f6
commit ca43006fd2
4 changed files with 6 additions and 18 deletions

View File

@@ -141,6 +141,7 @@ struct radeon_info {
uint32_t num_tcc_blocks;
uint32_t max_se; /* shader engines */
uint32_t max_sh_per_se; /* shader arrays per shader engine */
uint32_t max_wave64_per_simd;
/* Render backends (color + depth blocks). */
uint32_t r300_num_gb_pipes;
@@ -189,21 +190,6 @@ unsigned ac_get_compute_resource_limits(struct radeon_info *info,
unsigned max_waves_per_sh,
unsigned threadgroups_per_cu);
static inline unsigned ac_get_max_wave64_per_simd(enum radeon_family family)
{
switch (family) {
/* These always have 8 waves: */
case CHIP_POLARIS10:
case CHIP_POLARIS11:
case CHIP_POLARIS12:
case CHIP_VEGAM:
return 8;
default:
return 10;
}
}
static inline unsigned ac_get_num_physical_vgprs(enum chip_class chip_class,
unsigned wave_size)
{
@@ -221,7 +207,7 @@ ac_get_num_physical_sgprs(const struct radeon_info *info)
* of Wave32, which is double the number for Wave64.
*/
if (info->chip_class >= GFX10)
return 128 * ac_get_max_wave64_per_simd(info->family) * 2;
return 128 * info->max_wave64_per_simd * 2;
return info->chip_class >= GFX8 ? 800 : 512;
}