intel/elk: Remove uses of VLAs
Was causing trouble in some build configurations, we don't really need them. Unless there's a good reason, defaults to use ralloc for consistency with the larger codebase. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Antonio Ospite <None> Reviewed-by: Kenneth Graunke <None> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32916>
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@@ -1697,7 +1697,7 @@ elk_fs_visitor::split_virtual_grfs()
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/* Count the total number of registers */
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unsigned reg_count = 0;
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unsigned vgrf_to_reg[num_vars];
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unsigned *vgrf_to_reg = new unsigned[num_vars];
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for (unsigned i = 0; i < num_vars; i++) {
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vgrf_to_reg[i] = reg_count;
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reg_count += alloc.sizes[i];
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@@ -1866,6 +1866,7 @@ cleanup:
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delete[] vgrf_has_split;
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delete[] new_virtual_grf;
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delete[] new_reg_offset;
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delete[] vgrf_to_reg;
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return progress;
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}
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@@ -47,7 +47,7 @@ assign_reg(const struct intel_device_info *devinfo,
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void
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elk_fs_visitor::assign_regs_trivial()
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{
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unsigned hw_reg_mapping[this->alloc.count + 1];
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unsigned *hw_reg_mapping = ralloc_array(NULL, unsigned, this->alloc.count + 1);
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unsigned i;
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int reg_width = dispatch_width / 8;
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@@ -74,6 +74,7 @@ elk_fs_visitor::assign_regs_trivial()
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this->alloc.count = this->grf_used;
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}
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ralloc_free(hw_reg_mapping);
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}
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/**
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@@ -840,11 +841,7 @@ void
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elk_fs_reg_alloc::set_spill_costs()
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{
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float block_scale = 1.0;
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float spill_costs[fs->alloc.count];
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for (unsigned i = 0; i < fs->alloc.count; i++) {
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spill_costs[i] = 0.0;
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}
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float *spill_costs = rzalloc_array(NULL, float, fs->alloc.count);
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/* Calculate costs for spilling nodes. Call it a cost of 1 per
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* spill/unspill we'll have to do, and guess that the insides of
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@@ -919,6 +916,8 @@ elk_fs_reg_alloc::set_spill_costs()
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}
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have_spill_costs = true;
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ralloc_free(spill_costs);
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}
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int
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@@ -1179,7 +1178,7 @@ elk_fs_reg_alloc::assign_regs(bool allow_spilling, bool spill_all)
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* regs in the register classes back down to real hardware reg
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* numbers.
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*/
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unsigned hw_reg_mapping[fs->alloc.count];
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unsigned *hw_reg_mapping = ralloc_array(NULL, unsigned, fs->alloc.count);
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fs->grf_used = fs->first_non_payload_grf;
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for (unsigned i = 0; i < fs->alloc.count; i++) {
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int reg = ra_get_node_reg(g, first_vgrf_node + i);
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@@ -1199,6 +1198,8 @@ elk_fs_reg_alloc::assign_regs(bool allow_spilling, bool spill_all)
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fs->alloc.count = fs->grf_used;
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ralloc_free(hw_reg_mapping);
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return true;
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}
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@@ -882,7 +882,7 @@ elk_fs_instruction_scheduler::setup_liveness(elk_cfg_t *cfg)
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}
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}
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int payload_last_use_ip[hw_reg_count];
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int *payload_last_use_ip = ralloc_array(NULL, int, hw_reg_count);
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v->calculate_payload_ranges(hw_reg_count, payload_last_use_ip);
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for (unsigned i = 0; i < hw_reg_count; i++) {
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@@ -897,6 +897,8 @@ elk_fs_instruction_scheduler::setup_liveness(elk_cfg_t *cfg)
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BITSET_SET(hw_liveout[block], i);
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}
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}
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ralloc_free(payload_last_use_ip);
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}
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void
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@@ -269,7 +269,9 @@ TEST_P(validation_test, invalid_type_encoding)
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* instructions, so keep a record in a bitset the invalid patterns so
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* they can be verified to be invalid when used.
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*/
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BITSET_DECLARE(invalid_encodings, num_encodings);
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const int max_bits = 4;
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assert(max_bits >= num_bits);
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BITSET_DECLARE(invalid_encodings, 1 << max_bits);
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const struct {
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enum elk_reg_type type;
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@@ -377,7 +379,9 @@ TEST_P(validation_test, invalid_type_encoding_3src_a16)
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* instructions, so keep a record in a bitset the invalid patterns so
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* they can be verified to be invalid when used.
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*/
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BITSET_DECLARE(invalid_encodings, num_encodings);
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const int max_bits = 3;
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assert(max_bits >= num_bits);
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BITSET_DECLARE(invalid_encodings, 1 << max_bits);
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const struct {
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enum elk_reg_type type;
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@@ -1264,10 +1264,8 @@ void
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vec4_visitor::split_virtual_grfs()
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{
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int num_vars = this->alloc.count;
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int new_virtual_grf[num_vars];
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bool split_grf[num_vars];
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memset(new_virtual_grf, 0, sizeof(new_virtual_grf));
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int *new_virtual_grf = rzalloc_array(NULL, int, num_vars);
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bool *split_grf = ralloc_array(NULL, bool, num_vars);
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/* Try to split anything > 0 sized. */
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for (int i = 0; i < num_vars; i++) {
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@@ -1319,6 +1317,10 @@ vec4_visitor::split_virtual_grfs()
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}
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}
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}
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ralloc_free(new_virtual_grf);
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ralloc_free(split_grf);
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invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL | DEPENDENCY_VARIABLES);
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}
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@@ -2490,14 +2492,16 @@ vec4_visitor::run()
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if (INTEL_DEBUG(DEBUG_SPILL_VEC4)) {
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/* Debug of register spilling: Go spill everything. */
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const int grf_count = alloc.count;
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float spill_costs[alloc.count];
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bool no_spill[alloc.count];
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float *spill_costs = ralloc_array(NULL, float, alloc.count);
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bool *no_spill = ralloc_array(NULL, bool, alloc.count);
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evaluate_spill_costs(spill_costs, no_spill);
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for (int i = 0; i < grf_count; i++) {
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if (no_spill[i])
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continue;
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spill_reg(i);
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}
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ralloc_free(spill_costs);
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ralloc_free(no_spill);
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/* We want to run this after spilling because 64-bit (un)spills need to
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* emit code to shuffle 64-bit data for the 32-bit scratch read/write
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@@ -465,9 +465,7 @@ vec4_visitor::opt_copy_propagation(bool do_constant_prop)
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const int attributes_per_reg =
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prog_data->dispatch_mode == INTEL_DISPATCH_MODE_4X2_DUAL_OBJECT ? 1 : 2;
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bool progress = false;
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struct copy_entry entries[alloc.total_size];
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memset(&entries, 0, sizeof(entries));
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struct copy_entry *entries = rzalloc_array(NULL, copy_entry, alloc.total_size);
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foreach_block_and_inst(block, vec4_instruction, inst, cfg) {
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/* This pass only works on basic blocks. If there's flow
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@@ -478,7 +476,7 @@ vec4_visitor::opt_copy_propagation(bool do_constant_prop)
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* src/glsl/opt_copy_propagation.cpp to track available copies.
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*/
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if (!is_dominated_by_previous_instruction(inst)) {
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memset(&entries, 0, sizeof(entries));
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memset(&entries, 0, sizeof(copy_entry) * alloc.total_size);
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continue;
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}
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@@ -532,7 +530,7 @@ vec4_visitor::opt_copy_propagation(bool do_constant_prop)
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* our destination's updated channels, as the two are no longer equal.
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*/
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if (inst->dst.reladdr)
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memset(&entries, 0, sizeof(entries));
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memset(&entries, 0, sizeof(copy_entry) * alloc.total_size);
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else {
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for (unsigned i = 0; i < alloc.total_size; i++) {
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for (int j = 0; j < 4; j++) {
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@@ -546,6 +544,8 @@ vec4_visitor::opt_copy_propagation(bool do_constant_prop)
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}
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}
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ralloc_free(entries);
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if (progress)
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invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
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DEPENDENCY_INSTRUCTION_DETAIL);
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@@ -43,17 +43,13 @@ assign(unsigned int *reg_hw_locations, elk_backend_reg *reg)
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bool
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vec4_visitor::reg_allocate_trivial()
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{
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unsigned int hw_reg_mapping[this->alloc.count];
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bool virtual_grf_used[this->alloc.count];
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unsigned int *hw_reg_mapping = ralloc_array(NULL, unsigned, this->alloc.count);
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bool *virtual_grf_used = rzalloc_array(NULL, bool, this->alloc.count);
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int next;
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/* Calculate which virtual GRFs are actually in use after whatever
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* optimization passes have occurred.
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*/
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for (unsigned i = 0; i < this->alloc.count; i++) {
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virtual_grf_used[i] = false;
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}
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foreach_block_and_inst(block, vec4_instruction, inst, cfg) {
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if (inst->dst.file == VGRF)
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virtual_grf_used[inst->dst.nr] = true;
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@@ -81,6 +77,9 @@ vec4_visitor::reg_allocate_trivial()
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assign(hw_reg_mapping, &inst->src[2]);
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}
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ralloc_free(virtual_grf_used);
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ralloc_free(hw_reg_mapping);
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if (prog_data->total_grf > max_grf) {
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fail("Ran out of regs on trivial allocator (%d/%d)\n",
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prog_data->total_grf, max_grf);
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@@ -158,7 +157,6 @@ vec4_visitor::setup_payload_interference(struct ra_graph *g,
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bool
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vec4_visitor::reg_allocate()
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{
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unsigned int hw_reg_mapping[alloc.count];
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int payload_reg_count = this->first_non_payload_grf;
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/* Using the trivial allocator can be useful in debugging undefined
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@@ -176,6 +174,8 @@ vec4_visitor::reg_allocate()
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struct ra_graph *g =
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ra_alloc_interference_graph(compiler->vec4_reg_set.regs, node_count);
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unsigned int *hw_reg_mapping = ralloc_array(g, unsigned, alloc.count);
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for (unsigned i = 0; i < alloc.count; i++) {
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int size = this->alloc.sizes[i];
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assert(size >= 1 && size <= MAX_VGRF_SIZE(devinfo));
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@@ -454,8 +454,8 @@ vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill)
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int
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vec4_visitor::choose_spill_reg(struct ra_graph *g)
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{
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float spill_costs[this->alloc.count];
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bool no_spill[this->alloc.count];
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float *spill_costs = ralloc_array(NULL, float, this->alloc.count);
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bool *no_spill = ralloc_array(NULL, bool, this->alloc.count);
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evaluate_spill_costs(spill_costs, no_spill);
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@@ -464,6 +464,9 @@ vec4_visitor::choose_spill_reg(struct ra_graph *g)
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ra_set_node_spill_cost(g, i, spill_costs[i]);
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}
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ralloc_free(spill_costs);
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ralloc_free(no_spill);
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return ra_get_best_spill_node(g);
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}
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@@ -1264,8 +1264,8 @@ vec4_visitor::emit_resolve_reladdr(int scratch_loc[], elk_bblock_t *block,
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void
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vec4_visitor::move_grf_array_access_to_scratch()
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{
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int scratch_loc[this->alloc.count];
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memset(scratch_loc, -1, sizeof(scratch_loc));
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int *scratch_loc = ralloc_array(NULL, int, this->alloc.count);
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memset(scratch_loc, -1, sizeof(int) * this->alloc.count);
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/* First, calculate the set of virtual GRFs that need to be punted
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* to scratch due to having any array access on them, and where in
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@@ -1333,6 +1333,8 @@ vec4_visitor::move_grf_array_access_to_scratch()
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inst->src[i]);
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}
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}
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ralloc_free(scratch_loc);
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}
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void
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