intel/fs: Relax type matching rules in cmod propagation from MOV instructions
To allow cmod propagation from a MOV in a sequence like: and(16) g31<1>UD g20<8,8,1>UD g22<8,8,1>UD mov.nz.f0(16) null<1>F g31<8,8,1>D A similar change to the vec4 backend had no effect. Somewhere betweenc1ec582059
and40fc4b5acd
(1,094 commits) the effectiveness of this patch diminished, and as of commitd7e0d47b9d
(nir: Add a bunch of b2[if] optimizations) this optimization no longer has any effect on any platform. A later patch "intel/fs: Use De Morgan's laws to avoid logical-not of a logic result on Gen8+," generates some instruction sequences that require this change in order for cmod propagation to make progress. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@@ -263,10 +263,25 @@ opt_cmod_propagation_local(const gen_device_info *devinfo, bblock_t *block)
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break;
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/* Comparisons operate differently for ints and floats */
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if (scan_inst->dst.type != inst->dst.type &&
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(scan_inst->dst.type == BRW_REGISTER_TYPE_F ||
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inst->dst.type == BRW_REGISTER_TYPE_F))
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if (scan_inst->dst.type != inst->dst.type) {
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/* We should propagate from a MOV to another instruction in a
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* sequence like:
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*
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* and(16) g31<1>UD g20<8,8,1>UD g22<8,8,1>UD
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* mov.nz.f0(16) null<1>F g31<8,8,1>D
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*/
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if (inst->opcode == BRW_OPCODE_MOV) {
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if ((inst->src[0].type != BRW_REGISTER_TYPE_D &&
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inst->src[0].type != BRW_REGISTER_TYPE_UD) ||
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(scan_inst->dst.type != BRW_REGISTER_TYPE_D &&
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scan_inst->dst.type != BRW_REGISTER_TYPE_UD)) {
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break;
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}
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} else if (scan_inst->dst.type == BRW_REGISTER_TYPE_F ||
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inst->dst.type == BRW_REGISTER_TYPE_F) {
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break;
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}
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}
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/* If the instruction generating inst's source also wrote the
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* flag, and inst is doing a simple .nz comparison, then inst
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